This news directly came from a slide that used the 1000x faster to refer to having 1/1000th of the latency of NAND flash.
Assuming you can accept large enough transfer sizes and some parallel accesses, bandwidth of memory is driven by the interface, not the memory technology itself. HBM, GDDR5, DDR3, and even plain old SDR DRAM use very similar memory arrays running at quite similar speeds. The massive bandwidth difference is not gained by having faster memory (mostly, there has been some advancement but it's been shockingly slow by semiconductor standards), just by accessing more memory cells in parallel.
Similarly, the bandwidth of this device has almost nothing to do with the memory technology itself and almost everything to do with the interface it attaches to. If it attaches to a DDR4 socket, well, it will have bandwidth similar to DDR4.