Yeah, it would make most sense to do maybe 5 models tops. Two 8 cores, a 6 and two four.
Didnt we get somewhere that ALL SKUs will be unlocked and oc'able?
From an enthusiast standpoint that would argue to get the LP and overclock-away.
Didnt we get somewhere that ALL SKUs will be unlocked and oc'able?
From an enthusiast standpoint that would argue to get the LP and overclock-away.
Yes, all are OCble. But, how far they OC will depend on the bin, which is why I propose only 3 bins rather than 5 or 6.
As you and others point out, it may not even be 3 bins. I guess that will depend on what variability of performance across the wafer AMD are seeing.
I have never quite understood the binning process exempt maybe from the very early stages of a new node when everything is still getting sorted at the fab.. we have plenty of history with 'lesser skus' clocking 50%+ right past flagships and hitting same OC territory as said flagships.. Maybe things have changed I dont know.
Clocking right past flagships at what TDP?
For instance, with XFR, a very easy way of AMD to differentiate between Black Edition Ryzen and Standard Edition Ryzen would be to allow the user of BE chips to OC beyond the manufacturer set TDP.
Papermaster said tock tock tock for zen.What are the chances to see Zen (or Zen+/++) on 12nm FDX in 2-3 years? What changes are needed to use different process for this chip?
Wouldn't that make them kind of 'locked'?
When asked how long Zen would last, compared to Intel’s two-year tick-tock cadence, Papermaster confirmed the four-year lifespan and tapped the table in front of him: “We’re not going tick-tock,” he said. “Zen is going to be tock, tock, tock.”
Seems the way to accomplish any TDP limited scenario would be in the motherboard, by limiting voltage.
Sure looks like that. Damn, that moves slooow.So no news until gdc?
They might not need to lock any of them, just bin them for leakage and speed, and only make their top chipsets voltage adjustable.In that case we may have BE without voltage limit and standard edition with a voltage limit. But that would mean that base clocks would mean nothing and only the frequency the processor can reach on the limiting voltage would matter.
derka derka derka
So no news until gdc?
It's called marketing. What he says is irrelevant, it doesn't tell us anything.
AMD has been pushing performance per watt a lot lately.Something keeps nagging at my brain here, folks:
If you're AMD, why limit this upcoming octacore chip to 95 paltry watts?
Why not up the tdp to 110w - 120w and take the fight to BDW-E across the board, out of the gates? OR maybe that's what XFR is for - clocking chips up to 160w under turbo?
Something keeps nagging at my brain here, folks:
If you're AMD, why limit this upcoming octacore chip to 95 paltry watts?
Why not up the tdp to 110w - 120w and take the fight to BDW-E across the board, out of the gates? OR maybe that's what XFR is for - clocking chips up to 160w under turbo?
AMD has been pushing performance per watt a lot lately.
I agree, perf/w is great and all but why not sell a 8 core zen spaceheater edition for those who want to push it a little.
Since every SKU will be unlocked, just buy a 95W TDP SKU and OC as high as you want.
+1. You have to wonder. They only scenario I can come up with is that this is a server chip and when AMD was taking notes on the wishlist from the potential client pool, perf/watt came up. We have to face that *we* are not the target audience, we just get the scraps.
We know there are 3.6//4.0ghz 95 tdp ES's. People dont need to invent anything. I dont know why people AMD is going to show there hand 1 and a bit months before launch!Not that I think this is the case but remember how Fury was awesome right up to a certain wattage? I wonder...