New Zen microarchitecture details

[krumme]

I still think 4-5mm² isn't too far off the mark. The limiting factor isn't so much the amount of logic (as 14LPP would allow for ~70% area reduction vs. 28nm, but then come design styles, libs, etc.), but the W/mm².

Thanx.
You said there was several things pointing to high freq design eg. L1 latency.
I dont know crap about it, but wouldnt high freq normally lead to fatter core? - the limiting W/mm2 factor.?

 

[JoeRambo]

tatertot?

Sweepr and I relate to terrace215 from XS forums. Who got banned in a combination of AMD fans(Mass reporting and advocacy program), AMD employees(John Fruehe) and paid(as low as a couple of Opterons was enough) of some XS mods to protect the illusion of Bulldozer performance. In the end of the day, terrace215 was right and only got banned for PR reasons.

Anyone that dared to question Bulldozers performance was shills, AMD haters, liars, trolls and worse.

Yup, i remember that farse very well, haven't visited XS since then. Google up, and LOL, that same thread that got terrace banned has this "gem"

Johan got his information directly from AMD. The chart has fading bars and AMD(JF) already stated that only they know how high the bars actually go(that's the purpose of the fading btw,to not actually disclose the true perf. projection). You are reading waaaay to much into that chart,especially knowing that AMD couldn't possibly predict the clock speeds they would milk from the BD silicon at the time they made the chart. 60-80% uplift from MC is a good bet,but seeing how AMD delivered and over-delivered with Shanghai,Istanbul and especially MC,you can bet they will do all they can to over-deliver with BD when it launches.

edit:
a question : why are you so obsessed with AMD,BD perfromance/tapeout and 2011? Any chance you're an intel shareholder ?​

Extra lulz for "over-delivery" ()

Last 10 years should have been enough for anyone to realise that AMD is grossly incompetent in CPU business. While being a tech guy I am watching these tech details coming from DB with great interest and I mostly understand how he arrives to them from GCC/Kernel commits (thanks for great job btw).

The real problem is AMD execution history. Even greatest specs are irrelevant, there could be performance killer bottleneck of some stupid form anywhere in the chip. BD was full of those. Or chip could be great, but clocks not so due to precess/design issues...

Spec speculation is OK, performance predictions are irrelevant, AMD has no history of high perf chip design for well over a decade now, so only working silicon at retail clocks is acceptable for "performance evaluation".

 

[Sweepr]

Thanks for bringing this up Joe, we can see that the 'agree with insane performance/efficiency/price projections otherwise you're an Intel shareholder' talk is old. Curiously this particular XS/AnandTech member is using Haswell now (plot twist).

 

[ShintaiDK]

Classic one Joe. Including the shareholder part

 

[ElFenix]

tatertot?

Sweepr and I relate to terrace215 from XS forums.

And he posted here as tatertot.

 

[ShintaiDK]

And he posted here as tatertot.

Now I get the reference

 

[Dresdenboy]

My guess is in flux but...

I'm going around 10 mm² to 18 mm² per core, wide guess. This isn't a LP design, it's a HP design with wide DVFS. Which means Vt spacing, long gate lengths for everything, but sLVT transistors etc.

Without L2, XV is 14.48sqmm (with ~2sqmm free space), SR is 18.61sqmm. Removing one int core, one LSU w/ D$ and 2/3 of the 96kB L1I$ would reduce that area by 30%. 0.5MB L2 is 3sqmm. Still at 28nm.

FinFET by itself will boost frequency and the 10.5T HP libs use less area than 12T, which don't exist for 14/16nm FinFET.

 

[CHADBOGA]

tatertot?

Sweepr and I relate to terrace215 from XS forums. Who got banned in a combination of AMD fans(Mass reporting and advocacy program), AMD employees(John Fruehe) and paid(as low as a couple of Opterons was enough) of some XS mods to protect the illusion of Bulldozer performance. In the end of the day, terrace215 was right and only got banned for PR reasons.

Anyone that dared to question Bulldozers performance was shills, AMD haters, liars, trolls and worse.

Somewhat similar had "oddly enough" happened before with the Phenom release that was going to beat Intel with 40-50%.

XS managed to destroy their own forums by catering to insane AMD fans.

One of the best examples of Karma I have ever seen.

 

[DrMrLordX]

Yes but if its not FMA then Zen has a latency advantage (atleast over bulldozer), if its FMA then i have no idea, as how FMA exactly works on Zen is still unknown.

Good on Zen for having the latency advantage, but FMA (particularly FMA3) is going to be the issue I was driving at earlier. XV already has support for FMA3/AVX2, and presumably Zen will have the same. XV suffers pretty badly under AVX2, though, and my impression was that the major reason for that was its requirement that it split instructions in hardware before executing them. Maybe I'm wrong in my reasoning. All I know is that AVX2 code doesn't handle much better than the same code optimized for SSE3 instead when run on XV.

Zen is going to run into a bunch of AVX/AVX2 code optimized for Intel processors with 256-bit FMACs. If it can't handle that any better than XV then I'll be rather disappointed.

To be honest, I'm not interested in a 95 watt part. And I'm getting more than a little sick of people who are. Since when did enthusiasts care about wattage?

So you'd rather have a 150W CPU with 3.4 GHz base clock and 4.0 GHz boost, instead of a 95W CPU with 3.4 GHz base clock and 4.0 GHz boost? I see what you're trying to say, but you seem to have missed some of the early clockspeed estimates for Zen which put it at 3.33 GHz for the base clock and a turbo in the 4 GHz range . . . of course, those estimates did not take core count into consideration, so take them for what they're worth.

 

[Dresdenboy]

Thanx.
You said there was several things pointing to high freq design eg. L1 latency.
I dont know crap about it, but wouldnt high freq normally lead to fatter core? - the limiting W/mm2 factor.?

To be more accurate, it doesn't hint at a high frequency design à la BD, since NHM Intel also uses 4 cycles. But at least it hints at a FinFET design achieving more than say 3 GHz at reasonable voltages. Jaguar has a 3 cycle latency and reaches 2.2GHz @ 28nm while being a LP design without too much custom logic.

A fatter core can have very different causes. But here we're talking about fast transistors (14/16nm FinFET) in a not so dense process (20nm). Creating a 20-25 FO4 design would ease the timing pressure to use leaky transistors for critical paths. Maybe XV already went into that direction as it's already a heavily synthesized design, allowing for an easier change of target pipeline stage delays.

Here is an illustration of the possible benefits:

 

[raghu78]

AMD have said ZEN core is smaller than 10mm2

AMD have never made such a statement. But Zen is very likely to be < 10 sq mm. AMD are going for high core count in their server chips and thus their cores are likely to be smaller than Intel's Skylake or even Broadwell. Intel 14nm is also a much better process in terms of transistor density and transistor performance than Samsung 14LPP. So AMD has to keep their core smaller to fit 32 cores (64 threads) in the high end Zen server SKUs.

 

[MentalIlness]

I for one hope Zen lives up to the hype. Ive been using this FX 8120 since launch. I hold off a long time between upgrades. If Zen is....anything but advertised, then I will be going with a Skylake ....or the next Intel without a doubt. I've held off too long.

 

[itsmydamnation]

Good on Zen for having the latency advantage, but FMA (particularly FMA3) is going to be the issue I was driving at earlier. XV already has support for FMA3/AVX2, and presumably Zen will have the same. XV suffers pretty badly under AVX2, though, and my impression was that the major reason for that was its requirement that it split instructions in hardware before executing them. Maybe I'm wrong in my reasoning. All I know is that AVX2 code doesn't handle much better than the same code optimized for SSE3 instead when run on XV.

Zen is going to run into a bunch of AVX/AVX2 code optimized for Intel processors with 256-bit FMACs. If it can't handle that any better than XV then I'll be rather disappointed.
.

Zen is only going to have 128bit units. But it looks like it will have 2 fma units a core and con has 2 per module. Bulldozer had a slight performance hit going from avx128 to 256. There is a perf hit here because 256bit is a fast path double, it needs 2 mops and issues the two 128 bit operations back to back which means it takes an extra cycle.

But fma is liked more because of its precision increase not because vector code is loaded with multiple+add.

But very little real world code is 128 bit AVX let alone 256bit let alone fma. Most consumer and server fp code is just float and double not even sse. Games are 128 and won't change until lack of precision forces to 4x64bit and a console gen change.

So that leaves things like renderers and encoders which all scale nicely with core count.

Power is dominated by data movement, people
Shouldnt confuse throughput with ipc, but that hasn't stopped the predictable few here jumping the gun. At this stage there is no reason to think anything other then 100% throughput increase from con to Zen per core per clock assuming this throughput code has enough ilp.

Posted from mobile

 

[Soulkeeper]

I for one hope Zen lives up to the hype. Ive been using this FX 8120 since launch. I hold off a long time between upgrades. If Zen is....anything but advertised, then I will be going with a Skylake ....or the next Intel without a doubt. I've held off too long.

I've been waiting too.
Even if it don't beat up intel, all i'd like to see is it being a good deal better than the bulldozer family.

 

[grimpr]

The new AMD coolers show that AMD took seriously its shortcomings and its a glimpse that Zen will be a nice product, it wont beat Intel but i believe its gonna be a solid offering on a brand new platform with a unified socket with the apu's, vastly better than AM3+ and 28nm Bulldozers on all fronts.

 

[OVerLoRDI]

I've been waiting too.
Even if it don't beat up intel, all i'd like to see is it being a good deal better than the bulldozer family.

Yep, especially with DX12 bringing about less need for high single threaded performance. We don't need significantly better, we need matching or close so there is a viable alternative again.

 

[jhu]

Yep, especially with DX12 bringing about less need for high single threaded performance. We don't need significantly better, we need matching or close so there is a viable alternative again.

They really need more server wins too since that's where the large profit margins are.

 

[Exophase]

Zen is only going to have 128bit units. But it looks like it will have 2 fma units a core and con has 2 per module. Bulldozer had a slight performance hit going from avx128 to 256. There is a perf hit here because 256bit is a fast path double, it needs 2 mops and issues the two 128 bit operations back to back which means it takes an extra cycle.

Also, on the original Bulldozer fast path double took up two decoders and could only handle one at a time. So it could do 1-1-1-1 and 2-1-1 but not 2-2. Piledriver fixed this to allow 2-2, but it still had really slow 256-bit AVX stores, and 256-bit moves weren't elided by register renaming.

It's really unfortunate that AMD included all these microarchitectural defects. Another one for example is that only the first three out of the four decoders could fuse branches. These were things that aware compilers could work around to some extent, but no one was going to compile stuff specifically for Bulldozer.

 

[frozentundra123456]

The new AMD coolers show that AMD took seriously its shortcomings and its a glimpse that Zen will be a nice product, it wont beat Intel but i believe its gonna be a solid offering on a brand new platform with a unified socket with the apu's, vastly better than AM3+ and 28nm Bulldozers on all fronts.

Are you serious? I have no idea how zen will perform, but it seems pretty desperate to say it will perform well based on the cooler. I am sure they took Bulldozer seriuosly too, and look how that turned out.

 

[NTMBK]

Are you serious? I have no idea how zen will perform, but it seems pretty desperate to say it will perform well based on the cooler. I am sure they took Bulldozer seriuosly too, and look how that turned out.

Bulldozer comes with a water cooler, imagine how good that's going to be!

 

[ShintaiDK]

Exactly. If anything the new cooler as "standard" raises a red flag rather than removes one.

 

[cytg111]

Exactly. If anything the new cooler as "standard" raises a red flag rather than removes one.

I am going to quote frozentundra123456 here and multiply it with -1 :

"Are you serious? I have no idea how zen will perform, but it seems pretty desperate to say it will perform well based on the cooler. "

 

[dark zero]

If is good to bash AMD to hell here, I can say that is better that AMD gets broke and loses all their patents to Intel. Also is time to purge and take down the low cost market by sinking it for good.

 

[tential]

Are you serious? I have no idea how zen will perform, but it seems pretty desperate to say it will perform well based on the cooler. I am sure they took Bulldozer seriuosly too, and look how that turned out.

Exactly. If anything the new cooler as "standard" raises a red flag rather than removes one.

The irony here is hilarious.....

 

[USER8000]

The A10 7890K also comes with the same Wraith cooler but without the shroud.