New Zen microarchitecture details

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The Stilt

Golden Member
Dec 5, 2015
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It's something AMD should have definitely been paranoid about. Pentium M was able to reach Athlon 64 IPC and performance without an on-die memory controller. Clearly Intel was up to something, and if they ever put an on-die memory controller on their chips... AMD was resting on their laurels competing with Pentium 4 when they should have been going after Pentium M.

Real men may have fabs, but only the paranoid survive. Hopefully AMD is paranoid enough to make Zen competitive.

Can you imagine how I felt when I received a tray full of ES FX-62 CPUs and a single Conroe prototype on the same day. After a quick spin with the Conroe, I suddenly lost interest on those FXs. The difference was just absurd
 

JoeRambo

Golden Member
Jun 13, 2013
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Can you imagine how I felt when I received a tray full of ES FX-62 CPUs and a single Conroe prototype on the same day. After a quick spin with the Conroe, I suddenly lost interest on those FXs. The difference was just absurd


AMD was caught with pants down. Imo they got lulled into sense of security by reports from channel that next chip is still going to have mem controller on NB. Then 3Ghz+ Conroe happened I remember running E6400 and it was ridiculously good. Needless to say that I have never recommended AMD chip for 'perf' purposes since that day.

Problem is, that i doubt same can happen with ZEN. Instruction latencies/bandwiths are ridiculous by now, you would need double pumping or extra high clock to beat Intel. Hard (and similar to P4 / 'dozer ).
What is easy tho, is ways it is possible to screw up perf or inversely - how many iterations it took Intel to improve and get it right.
 

nismotigerwvu

Golden Member
May 13, 2004
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That's not what your link says. Look again. Those are Dothan Pentium M being compared with. Their IPC is on par with the Athlon 64.



Your link shows Yonah, and IPC was also on par with Athlon 64.

Sure in particular situations where bandwidth wasn't an issue and the FPU wasn't getting hammered. By that logic the FX 8350 was neck and neck with the 3770K because of this (http://images.anandtech.com/graphs/graph6396/51137.png), this (http://images.anandtech.com/graphs/graph6396/51130.png) and this (http://images.anandtech.com/graphs/graph6396/51133.png). Look through the entire suite of benchmarks and you'll see the best case scenario was catching the X2 and in most cases it lagged behind. Also keep in mind that was the lowest clocked X2 and the highest clocked Pentium M. It was not a given that Conroe would be a world eater.
 

jhu

Lifer
Oct 10, 1999
11,918
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Sure in particular situations where bandwidth wasn't an issue and the FPU wasn't getting hammered.

3d Studio Max, Adobe Premiere and Photoshop do hammer the the FP units.

By that logic the FX 8350 was neck and neck with the 3770K because of this (http://images.anandtech.com/graphs/graph6396/51137.png), this (http://images.anandtech.com/graphs/graph6396/51130.png) and this (http://images.anandtech.com/graphs/graph6396/51133.png). Look through the entire suite of benchmarks and you'll see the best case scenario was catching the X2 and in most cases it lagged behind. Also keep in mind that was the lowest clocked X2 and the highest clocked Pentium M. It was not a given that Conroe would be a world eater.

If you look closer at my prior post, I was talking about IPC, not necessarily total performance. But since you bring up these other tests:

http://images.anandtech.com/graphs/graph6396/51137.png - Piledriver has lower IPC than Ivy Bridge in 7-zip
http://images.anandtech.com/graphs/graph6396/51130.png - Sysmark is kind of a useless benchmark (but Piledriver has lower IPC than Ivy Bridge here)
http://images.anandtech.com/graphs/graph6396/51133.png - Piledriver has lower IPC than Ivy Bridge in Par2
 

jhu

Lifer
Oct 10, 1999
11,918
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So that means what, > 3.2GHz? That tells us very little.

It definitely does tell us very little especially since construction cores actually start at 1.6 GHz (Opteron 6262 HE and Opteron 4256 EE). Unless he means target max clocks
 

krumme

Diamond Member
Oct 9, 2009
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So that means what, > 3.2GHz? That tells us very little.
Well as a guess it looks like they were gunning for something between 8c hwe and bwe in 95w tdp with a smaller die in workloads that exclude avx512.

The problem is not so much what they were gunning for but to get that freq at gf. In some sense it seems surreal if gf suddenly starts to crank out tons of 14nm polaris vega zen. Lol. I would like to see gf perform before i believe it. But hey it would be fantastic and why not hope for the best. Its most fun.
 

Exophase

Diamond Member
Apr 19, 2012
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It definitely does tell us very little especially since construction cores actually start at 1.6 GHz (Opteron 6262 HE and Opteron 4256 EE). Unless he means target max clocks

I assumed that's what he meant, but it's still a really open statement. And one which feels like a tacit admission that the clocks will be noticeably below the max seen on construction cores (which aren't that different from the max seen on Intel's contemporary cores, unless one's counting FX-9590 and I wouldn't)

That and the boasting of IPC instead of aggregate single threaded performance.

But I think everyone kind of accepts this by now.
 
Aug 11, 2008
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Well as a guess it looks like they were gunning for something between 8c hwe and bwe in 95w tdp with a smaller die in workloads that exclude avx512.

The problem is not so much what they were gunning for but to get that freq at gf. In some sense it seems surreal if gf suddenly starts to crank out tons of 14nm polaris vega zen. Lol. I would like to see gf perform before i believe it. But hey it would be fantastic and why not hope for the best. Its most fun.

Those seem like very.....optimistic predictions, especially in a 95 watt TDP. Unless they are clocked really low.
 

itsmydamnation

Platinum Member
Feb 6, 2011
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So that means what, > 3.2GHz? That tells us very little.


when you add that to statements like:

For a long time I actually like what I see. I´d say as long as the consumer Zen parts can reach high enough clocks (min. 3.5GHz), everything will be pretty good

https://semiaccurate.com/forums/showpost.php?p=257718&postcount=2120

also at the release time of piledriver for example, ivy bridge didn't really clock that close. I couldn't get my ivy 3770k stable above 4.3 on AVX workloads(heat). my FX 8350 is @4.6 while undervolted and spends most of its days transcoding 1080p in real time, I never bothered to try pushing it higher. my ivy has a significantly more expensive cooler on it as well.

I also wonder why people think Zen will inherently clock lower, some of the patients for things that are in Zen actually have extra pipeline stages so all other things being equal pipeline length might grow.

The two obvious area's that could be a clock limit is PRF complexity and forward/bypass network complexity. Both of those we currently have no idea about, Dresden boy thinks there might be a ALU:AGU scheduler split, another possibility is a 2:1 cluster configuration. But even at worst case its less read/write ports to the PRF also with significantly less width compared to haswell etc.

my assumption is the stuff that has seen focus on SR and EV will be evolutions in Zen, so that says the front end and Load/store pipelines will be similar so I wouldn't expect them to be a clocking bottleneck.

So that leaves the unknown of process. Im not game to make any guess on what final clocks would be but at the same time I don't see any known reason to be so pessimistic.
 
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Ajay

Lifer
Jan 8, 2001
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So that leaves the unknown of process. Im not game to make any guess on what final clocks would be but at the same time I don't see any known reason to be so pessimistic.


Global Foundries. That is the reason to be concerned. So far, they have a poor track record. If that changes for 14 LPP - then things start to look much better.
 

The Stilt

Golden Member
Dec 5, 2015
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I don't see any known reason to be so pessimistic.

The single biggest thing is the manufacturing process. If AMD hadn't had their hands tied with WSA, would they've chosen 14nm LPP over TSMC 16nm FF+?

Broadwell-DT and Skylake-S have no essential differences in the architecture. They are manufactured using a different process variant. Skylake-S on the high performance process variant has 300-600MHz higher Fmax than Broadwell-DT. A coincidence?

Also look at Excavator. Steamroller was manufactured on GF28A manufacturing process, which is tuned for higher performance than the standard GF28HPP process is. In Excavator AMD doubled the L1D size and lowered the latency of the L2 and reduced it's size in half. All 15h designs are L2 cache restricted in terms of the Fmax, however reducing the size of the L2 should have been more than enough to compensate the lower latency. Still Excavator shows no frequency scaling beyond ~4.0GHz, while Steamroller scaled quite well up to ~4.7GHz. Beyond 4.0GHz Excavator shows no response to voltage increments (moderate) or to lower temperatures. If Excavator was L2 limited in terms of Fmax, it would most likely still show a rather linear response to voltage increase. All other 15h cores do.

Zeppelin has yet smaller L2 than Excavator, however it is expected to have (must have) significantly lower latency too.

Personally I'm extremely surprised if Zeppelin is able to hit over 3.5GHz without completely wrecking it's power efficiency (this is where the low core count Turbo comes in). I would also be surprised if it has more than 10% overclocking headroom (with reasonable power increase) out of the box (8C/16T). I would be even more surprised if it is ever able to reach >4.5GHz, even if we are talking about a suicide LN2 run.

In fact I expect Zeppelin to behave exactly the same as Llano did.
 
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itsmydamnation

Platinum Member
Feb 6, 2011
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The single biggest thing is the manufacturing process. If AMD hadn't had their hands tied with WSA, would they've chosen 14nm LPP over TSMC 16nm FF+?
They did for GPU's and they aren't being manufactured at GF but Samsung directly AFAIK.

Zeppelin has yet smaller L2 than Excavator, however it is expected to have (must have) significantly lower latency too.
Don't confuse access latency with array speed. CON cores L2 arrays are fast (according to mr kanter). The latency is a product of the CMT design and cache design. Remember in the "old world" where SR got a proper server chip a new cache system was going to be deployed which might have helped in that regard. The cache system in Zen is likely an evolution of that design.
 

deasd

Senior member
Dec 31, 2013
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Global Foundries. That is the reason to be concerned. So far, they have a poor track record. If that changes for 14 LPP - then things start to look much better.

Any source that saying Zen would be manufactured by GloFo? I've seen this 'confirmation' by some posters several times but still no exact news around.

Don't confuse access latency with array speed. CON cores L2 arrays are fast (according to mr kanter). The latency is a product of the CMT design and cache design. Remember in the "old world" where SR got a proper server chip a new cache system was going to be deployed which might have helped in that regard. The cache system in Zen is likely an evolution of that design.

CON's high L2 latency might due to two dedicated integer cluster which have high latency as well, but Zen would not have this problem. Zen might be call a 'evolution' against K10 Hound but makes no sense when compare Zen to CON cores.
 

Ajay

Lifer
Jan 8, 2001
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Any source that saying Zen would be manufactured by GloFo? I've seen this 'confirmation' by some posters several times but still no exact news around.

In this case, there doesn't need to be news - AMD is bound by the WSA agreement with GF to produce their CPUs there. This has been covered in detail here at ATF over the past 5 years or so.
 

coercitiv

Diamond Member
Jan 24, 2014
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For those of you who want to see the presentation, page link for Investor Relations is here, and pdf is here. Slide 13 also states the following about Zen:
This is getting sad, they removed the comparison slide (Excavator vs Zen) from the investor presentation. The old link posted above still points to the original file, but the investor page now contains a new link with a different file, 1 slide shorter :sneaky:
 

Dresdenboy

Golden Member
Jul 28, 2003
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citavia.blog.de
This is getting sad, they removed the comparison slide (Excavator vs Zen) from the investor presentation. The old link posted above still points to the original file, but the investor page now contains a new link with a different file, 1 slide shorter :sneaky:

Likely they didn't expect the media coverage and now got lots of calls.
 

Redentor

Member
Apr 2, 2005
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For all AMD fans out there, we have good news. AMD has just informed us, that the new ‪#‎AM4‬ CPUs will use the standard mounting holes that has become the norm since AM2. This means, all Thermalright coolers will be compatible to the new ‪#‎Zen‬ processors.

https://www.facebook.com/thermalright/posts/10153794924514102

Nope: https://www.facebook.com/thermalright/posts/10153796912434102?__fns&hash=Ac1SLaIFUQYWMrwc

They were right: http://www.bitsandchips.it/52-engli...holes-arranged-differently-than-older-sockets
 

MentalIlness

Platinum Member
Nov 22, 2009
2,383
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http://hexus.net/tech/news/cpu/93140-amd-slide-shows-zen-cpu-offers-double-fx-8350-performance/

A slide revealed at an AMD investor meeting shows comparative performance between AMD's eagerly anticipated Zen CPUs and earlier generation processors from the chipmaker. Of the two comparative graphs revealed in the slide, the most interesting is on the right, where we see that the 'Summit' processor for high end desktops appears to provide double the 'Orochi' score in Cinebench multi-threaded compute tests. Summit Ridge processors include AMD Zen CPUs and Orochi is the codename for the AMD FX 8350 CPU.

Tech site WCCFTech uncovered the above slide and did a bit of maths based upon the graphs. It came to the conclusion that the upcoming Zen CPU, as performance charted above, will be direct competition for the octa-core Intel Core i7 5960X. There's quite a lot of assumptions in there, considering the sketchy graphs, with the one on the right probably (but not necessarily) sharing the same axes/scale as the other graph.

On the topic of the upcoming Zen processors, a wafer shot of AMD's octa-core Summit die is thought to have been 'accidentally' revealed by AMD at its shareholder's meeting earlier this month. Tech commentators over at SemiAccurate are largely of the opinion that the wafer shot reveals that each Zen module will comprise of; four cores, an L3 cache in the centre and a DDR4 interface on top, with a South Bridge to the top right. Furthermore some suggest that on the bottom right of the chip is a Global Memory Interconnect (GMI) for chip-to-chip communication



It will likely be the end of this year before we see Zen-based high end desktop processors. AMD does have new desktop processors to show us soon though, the "launch of 7th Generation AMD A-Series Processors, Polaris updates and more," are scheduled for Computex in less than a week.
 
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The Stilt

Golden Member
Dec 5, 2015
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Thermalright said:
It seems AMD in Germany and the US have different informations on the new AM4 series. According to yet another source from AMD, AM4 will indeed use a different mounting system. We are sorry for the confusion.

Pretty telling D:
 

MrTeal

Diamond Member
Dec 7, 2003
3,584
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Pretty telling D:

Sounds like there's a little confusion there. We'll have to wait until hopefully Computex, but it seems like the tab mounted cooler should be compatible but ones that use the mounting holes will not. That's quite unfortunate though, since most of the higher price coolers that people would want to reuse would remove the tab mounts.
 
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