And looking at zen i am sure they wish they hadnt made that salad.In other words it's an AVX salad
Now everyone goes for the steak.
And looking at zen i am sure they wish they hadnt made that salad.In other words it's an AVX salad
... "Yeah but IPC, yeah but clocks, yeah but price, yeah but fake demo, yeah but but but..."...
Don't worry, juanrga will come up with something . I have to admit the clocks have really surprised me. I figured maybe 3.2GHz base, 3.4GHz turbo. Maybe just maybe 3.6GHz single core turbo. After seeing Pascal clocks on TSMC 16nm vs GloFo 14nm LPP (1050) I was somewhat concerned for Zen. I'm glad to see it looks better than almost anyone (reasonably) expected.
Clock scaling is not just a matter of process node, it's up to architecture itself too.
Sorry I misremembered the details: it's not exactly string instructions but using other AVX2 instructions to speed up string code.Ineterresting. I found this, dont know if its applicable.
http://stackoverflow.com/questions/...ring-instructions-and-mullo-for-unsigned-shor
PCMPESTRI AVX2 Improvement
bench.c 3,900,156 6,963,788 1.79x
fukamachi.c 4,807,692 8,064,516 1.68x
Sorry I misremembered the details: it's not exactly string instructions but using other AVX2 instructions to speed up string code.
https://blog.cloudflare.com/improving-picohttpparser-further-with-avx2/
Code:PCMPESTRI AVX2 Improvement bench.c 3,900,156 6,963,788 1.79x fukamachi.c 4,807,692 8,064,516 1.68x
The world is quickly running out of "buts". This is happening. Zen is approaching like a mile wide rock from space.
Zen, with its 4x128 FPU pipeline, NOT SHARED with INT resources, can do (256 FP wise):
- 1 FMUL + 1 FADD or 1 FMAC
Skylake with its 2x256 pipelines:
- 1 FMUL + 1 FADD or 2 FMAC
If not using the FMACs (not all algorithm allows that), Zen can lose only on simple calculations that have lots of load and store and that are cache friendly.
If there is a FDIV, an FSQRT or more that 3-4 instructions each load or store, the bottleneck becomes the other units and not the load/store
If the code is not cache friendly (a stream of data to be added or multiplied), then the bottleneck becomes the RAM.
Even if the code is full of FMACs, if there are the two conditions above, the limiting factors are the same.
Think of Blender. Do you think that to do raytracing you don't need any division, sqrt or complicated calculus (more that 3-4 instructions) for each memory data bit?
Only simple BLAS (linear algebra) routines will see high gains from SKL architecture...
The 7700K is worse, having one thousand bigger number for the same CPU.
You are right... I had already this conversation on another forum and i was wrong because I found an alleged skylake graph that had voids, filled with hasweel informations...Just a clarification: Skylake indeed does 2 FMUL or 2 FADD on YMM registers. You could check it here: http://users.atw.hu/instlatx64/GenuineIntel00506E3_Skylake_InstLatX64.txt
Btw, Haswell (http://users.atw.hu/instlatx64/GenuineIntel00306C3_Haswell_InstLatX64.txt) or Broadwell (http://users.atw.hu/instlatx64/GenuineIntel00406F1_BroadwellE_InstLatX64.txt) could do only one FADD, but they could do two FMA or two FMUL per cicle.
Byes
... AMD trolling Intel...
You are right... I had already this conversation on another forum and i was wrong because I found an alleged skylake graph that had voids, filled with hasweel informations...
Ok, as "documented by Intel", let's check Intel Intel ia64 and ia32 architectures Optimization Reference Manual: http://www.intel.com/content/www/us...-ia-32-architectures-optimization-manual.htmlActually you were right, Hardware.fr dedicated uarches journalist said that the evolution from HW is minor and that the only change in exe ressources, documented by Intel, is the addition of a VEC SHIFT in the port 1 (and eventually a JMP in port 6) , otherwise the ports 0/1 can do FPMUL but only port 1 has a FPADD.
So that s either 2 FPMUL or 1 FPMUL + 1 FPADD.
http://www.qdpma.com/SystemArchitecture_files/Microarchitecture_Haswell_IDF.png
https://pics.computerbase.de/7/4/2/7/9/5-1080.3740648461.png
With everything riding on Ryzen’s launch, AMD isn’t taking chances. Jim Anderson, senior vice president and general manager of AMD’s Computing and Graphics business, told PCWorld that Ryzen chips will be available from day one. “We’re not going to do a paper launch,” he said, referring to a “launch” where customers have to wait weeks or months for the products to actually arrive. “We’ve done that before. We’re not going to mess with it.”
While Anderson’s responsible for bringing Ryzen to market—“you don’t have any idea how many hours I and my team have spent on this,” Anderson said—it’s Papermaster who has to think of the future. When asked how long Zen would last, compared to Intel’s two-year tick-tock cadence, Papermaster confirmed the four-year lifespan and tapped the table in front of him: “We’re not going tick-tock,” he said. “Zen is going to be tock, tock, tock.”
Reddit user summary said:https://www.reddit.com/r/Amd/comments/5mfjun/amd_drops_huge_news_on_ryzen_overclocking_and/
Summary...
Edit: Looking at a few of the B350s shown at CES some of them definitely support Crossfire. I going to say PCWorld has this a little wrong. I would say that B350s will support x16 x4 crossfire only x8 x8 Crossfire/SLI will be reserved for x370 similar to how Intel differentiates the Z and B/H chipsets.
- There will be full range of CPUs available at launch, not just 8 core.
- All Ryzen chips are overclockable.
- However, not all mobo's will allow overclocking, only x370, x300, and b350.
- Only x370 will allow Crossfire and SLI. (Not quite right, see edit below).
- AMD is aiming for early to mid Q1 for launch. (GDC?)
By the way, why would quad core Raven Ridge APUs be cheaper octa core Summit Ridge?.
laptop and OEM. everyone else should do what you just saidRaven Ridge APU's would have to be cheaper unless they've got a massive performance improvement within the included CU's. Enough to actually make sense to just buy Raven Ridge for a low-mid range machine instead of buying a cheap Ryzen and cheap card.
AMD can't market if they're life depended on it. Zen may be the next coming of Christ but word of mouth will only carry it so far. They would need a multi million dollar worldwide marketing campaign which i believe they're incapable of pulling off.I was going to post some lame joke about "buts" and rocks from space, but my humour isn't up to scratch today.
Suffice to say that from what I've seen so far AMD has a potential customer here, and I mean that in the nicest possible way. Now just launch it AMD. There's a wad of cash waiting when you do.
Did you forget the /sarcasm tag?AMD can't market if they're life depended on it. Zen may be the next coming of Christ but word of mouth will only carry it so far. They would need a multi million dollar worldwide marketing campaign which i believe they're incapable of pulling off.
Chip will be good but sales will be bad. Unlike their radeon graphics division which is making decent profit, Zen will tank because nobody outside enthusiast forums knows what Zen is.
Haven't seen a single ad of an AMD product in my country since i don't know how many years. People here have completely forgot what AMD is. Nobody knows who AMD is! How are they going to sell their product without marketing? Is it possible for a product to be a success without any advertisement /marketing?Did you forget the /sarcasm tag?
You better tell qualcomm that for the last 5 years they had no chance..........oh wait.........
You better tell dell/hp/super mirco there is no point making server sku's cuz consumer marketing.........
You better tell dell/hp/lenovo/acer/etc there is no point making OEM PC or laptops because people only by because of intels name no theres......
Are you serious?
And Cherry Trail, too.Except Intel removed AVX on Pentium and celerons so they can't do that.
And remember how it was explained to you, by Blameless for instance, that the stock Blender builds are trash?Also remember that whole blending thing i explained to you ( love how you now say blender has a "compiler issue" ) about refactoring of code and then supporting multiple paths
Quit with the posturing. When you start sending me a paycheck then maybe you'll have earned the right to be rude.You really dont get it do you.
currentlyOf course, as most GameWorks stuff runs on the GPU, this 1% improvement (if at all) will turn things around.
OEM's and large coporations don't need a massive marketing effort to know about Ryzen. I doubt AMD could even keep up with demand initially just from those two sources.Haven't seen a single ad of an AMD product in my country since i don't know how many years. People here have completely forgot what AMD is. Nobody knows who AMD is! How are they going to sell their product without marketing? Is it possible for a product to be a success without any advertisement /marketing?