New Zen microarchitecture details

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realibrad

Lifer
Oct 18, 2013
12,337
898
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Has AMD done the impossible? To be able to leapfrog Intel with Ryzen despite the fact that Intel has 10x the R&D and manpower? Or is yet another hypetrain that will crash at launch?

Lisa Su seems extremely confident.

http://finance.yahoo.com/news/amd-ceo-why-its-good-to-be-the-smaller-guy-195512478.html

With AMD being behind for so long, Intel started shifting its R&D into things that were growing markets. HEDT was not one of those things, and I dont know server side but I would bet its not been getting the R&D growth it always had before. Intel has the money to throw at R&D but it also wants to get a return on that investment. Its going to be interesting because last time Intel had this happen, they threw money around and we got some nice chips.
 

Phynaz

Lifer
Mar 13, 2006
10,140
819
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Compared to other CEO's; she is coming off as a technical wizard.

I can guarantee you that as CEO she isn't making technical decisions. That's not the CEO's job.

But yes, she does appear to be executing much better than her last couple of predecessors.
 

itsmydamnation

Diamond Member
Feb 6, 2011
3,020
3,779
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With AMD being behind for so long, Intel started shifting its R&D into things that were growing markets. HEDT was not one of those things, and I dont know server side but I would bet its not been getting the R&D growth it always had before. Intel has the money to throw at R&D but it also wants to get a return on that investment. Its going to be interesting because last time Intel had this happen, they threw money around and we got some nice chips.

Well last time at Intel it was kind of mutiny, it didn't just happen because Core was the better processor, now they dont have a 2nd uarch in the wings so it will take longer for intel to react. IF intel has no plans to really push IPC hard going forward then really it is a good 3-4 years from now to turn around a design that does.
 

CentroX

Senior member
Apr 3, 2016
351
152
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With AMD being behind for so long, Intel started shifting its R&D into things that were growing markets. HEDT was not one of those things, and I dont know server side but I would bet its not been getting the R&D growth it always had before. Intel has the money to throw at R&D but it also wants to get a return on that investment. Its going to be interesting because last time Intel had this happen, they threw money around and we got some nice chips.
Well last time at Intel it was kind of mutiny, it didn't just happen because Core was the better processor, now they dont have a 2nd uarch in the wings so it will take longer for intel to react. IF intel has no plans to really push IPC hard going forward then really it is a good 3-4 years from now to turn around a design that does.

and isn't their next lake in 2018? They wont have the time to react fast enough if Ryzen is really good.
 

bjt2

Senior member
Sep 11, 2016
784
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http://wccftech.com/amd-zen-naples-server-cpu-vega-gpu-platform/

What was being told about Naples now seems to be true. 32C/64T, 8 channel DDR4 memory and 128 PCI-E 3.0 lanes. AMD really went big on this server platform. Intel Purley is running into a monster AMD server platform.

If Naples is made by 4 MCM Zen dices, each zen die should have 128/4=32 PCIe 3.0 lanes... Some are fused in consumer? Or 128 (and so 32) are calculated including NVMe, SATA, USB and South Bridge PCIe ports?
 

Doom2pro

Senior member
Apr 2, 2016
587
619
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As posted by livebriand in SA forums, some new information (confirmation) about Zen's Turbo Boost: http://arstechnica.com/gadgets/2017/01/amd-ryzen-motherboards-hype/

A lot of processors have pre-programmed clock speed voltage tables," explained AMD's Robert Hallock at CES. "We don't. This is very algorithmic. We analyse power consumption limits, thermal limits, silicon utilisation limits, and out of that boundary, if none of those limits are being met, you can just keep raising clock speed until one of them is. Then you level off the boost and then try to sustain it as long as possible. The system is smart enough to know what's going on inside itself, and adaptive enough to prevent sudden drops in clock speeds.
 
Reactions: Gideon

iBoMbY

Member
Nov 23, 2016
175
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If Naples is made by 4 MCM Zen dices, each zen die should have 128/4=32 PCIe 3.0 lanes... Some are fused in consumer? Or 128 (and so 32) are calculated including NVMe, SATA, USB and South Bridge PCIe ports?

Yes, it currently looks like the AM4 package is crippling Summit Ridge: Missing at least 8 PCIe lanes, missing integrated NIC (10 or 100 GbE?), missing ECC support, and maybe more.
 

Gideon

Golden Member
Nov 27, 2007
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As posted by livebriand in SA forums, some new information (confirmation) about Zen's Turbo Boost: http://arstechnica.com/gadgets/2017/01/amd-ryzen-motherboards-hype/

Thanks,

I also found this interesting and am feeling hopeful

At CES, the company [AMD] openly asked journalists what it should be priced at. Price an eight-core Ryzen at around £400/$500 and you bring down the cost of eight-core chips to that of a six-core—a solid move for consumers, but not one that will greatly affect mainstream performance. Price it the same as a quad-core i7-7700K—about £300/$330—and you dramatically shake up the industry. The decision is yet to be made.

"There are a lot of discussions going on," says Hallock. "We're capturing the feedback. We wanna take share, we wanna be the best price/performance option, we wanna be the first on people's minds. That's part of the bounding box for pricing discussions as well as paying off the R&D investment... We're looking at what Intel does—and we're not gonna do that. We think people want the choice, and need the choice. The market needs the choice—hopefully we can turn it around."
 

The Stilt

Golden Member
Dec 5, 2015
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Yes, it currently looks like the AM4 package is crippling Summit Ridge: Missing at least 8 PCIe lanes, missing integrated NIC (10 or 100 GbE?), missing ECC support, and maybe more.

Those "missing" links are used for the IO extender (Promontory). The server platforms have more links available, because there is no IO extender.
ECC is not missing either (AM4), however I'm not certain if it will be available on consumer SKUs.
 
Reactions: Doom2pro

Atari2600

Golden Member
Nov 22, 2016
1,409
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I can guarantee you that as CEO she isn't making technical decisions. That's not the CEO's job.
But yes, she does appear to be executing much better than her last couple of predecessors.

Not the CEO's job to understand what the company they are in charge of does?

Any wonder most CEOs are f**king inept and companies manage to get by in spite of them rather than because of them.

If the CEO cannot sit in a meeting and have a decent grasp of the fundamental elements of the issues that the worker-bees are facing in doing something, then they've no business in that business. No amount of shiny suits, slick haircuts and power-point bullsh!t will change that.


Edit: I suppose, somewhat contradictory to what I've said above - AMD's designing of Zen has involved a clearout of "managers" and allowing a small experienced group of engineers a free hand in getting on with it without being burdened by the gantt chart mafia.
 
Last edited:

iBoMbY

Member
Nov 23, 2016
175
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Those "missing" links are used for the IO extender (Promontory). The server platforms have more links available, because there is no IO extender.
ECC is not missing either, however I'm not certain if it will be available on consumer SKUs.

AM4 offers 16 (GPU) +4 (NVMe/I/O) + 4 (Promontory) = 24 PCIe lanes, that's 8 less than 32.

There is no BKDG for Family 17h published yet unfortunately, but if you look at the Family 16h BKDG for example, you will also see they don't offer ECC on the AM1 package, but on the FP3 package, and that's the reason why no AM1 board supports it.
 

CentroX

Senior member
Apr 3, 2016
351
152
116
I am looking to buy the X370 MB. I have always went with Asus, Is there a good alternative to Asus? Before Asus I always bought Abit.
 

Phynaz

Lifer
Mar 13, 2006
10,140
819
126
Not the CEO's job to understand what the company they are in charge of does?

Any wonder most CEOs are f**king inept and companies manage to get by in spite of them rather than because of them.

If the CEO cannot sit in a meeting and have a decent grasp of the fundamental elements of the issues that the worker-bees are facing in doing something, then they've no business in that business. No amount of shiny suits, slick haircuts and power-point bullsh!t will change that.

AMD currently has > 8,000 employees. How many of them do you think Lisa Su has contact with as CEO?

If worker bees are having issues that's for leadership much further down the org chart to resolve.
 

The Stilt

Golden Member
Dec 5, 2015
1,709
3,057
106
AM4 offers 16 (GPU) +4 (NVMe/I/O) + 4 (Promontory) = 24 PCIe lanes, that's 8 less than 32.

There is no BKDG for Family 17h published yet unfortunately, but if you look at the Family 16h BKDG for example, you will also see they don't offer ECC on the AM1 package, but on the FP3 package, and that's the reason why no AM1 board supports it.

32 links is accurate, 8 required by Promontory = 24 usable GP links. Since Promontory has some PCIe pass-through, the number of usable links might be slightly higher depending on the config.
You can come to the same conclusion by looking the server platform, even if you don't have the documents available. Naples has up to 128 links and no IO extender. 128 / 4 = 32.

AM1 (FS1r2) supports ECC as long as the motherboards are built with ECC support.
 

Atari2600

Golden Member
Nov 22, 2016
1,409
1,655
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AMD currently has > 8,000 employees. How many of them do you think Lisa Su has contact with as CEO?

Probably over the course of a month, a hundred or so.

AMD will live or die depending on Zen. Her, and the rest of the technically adept execs will have been immersed in it as much as is practical to ensure every angle is covered as best as they can. While they won't be guiding any detail decision making of the architecture (that was mostly Jim Keller's hand on that tiller), they will have defined the requirements and be balancing performance vs. cost vs. time.

Who do you think made the decision to have an F4 stepping as opposed to calling it a day at F3? Jim Keller who left months ago or the remaining Zen design leads + exec board?


http://www.amd.com/Documents/AMD_Excecutive_Org_Chart.pdf
 

CentroX

Senior member
Apr 3, 2016
351
152
116
Why did Jim Keller already leave in 2015? Was he finished and happy, or was it something else behind the curtains?
 

Abwx

Lifer
Apr 2, 2011
11,728
4,647
136
n. While they won't be guiding any detail decision making of the architecture (that was mostly Jim Keller's hand on that tiller)

Jim Keller who left months ago or the remaining Zen design leads + exec board?


http://www.amd.com/Documents/AMD_Excecutive_Org_Chart.pdf

Undoubtly that Keller has a lot of credentials but Mark Papermaster is not to be underestimated, he s of the same level, roughly...

https://en.wikipedia.org/wiki/Mark_Papermaster

Besides Lisa Su has all necessary competences in semiconductors technology...

https://en.wikipedia.org/wiki/Lisa_Su
 

zinfamous

No Lifer
Jul 12, 2006
111,530
30,729
146
I am looking to buy the X370 MB. I have always went with Asus, Is there a good alternative to Asus? Before Asus I always bought Abit.

Gigabyte makes really good boards. I've only ever gone with Asus and Gigabyte, but I tend to prefer Gigabyte these days. MSI is good, too.
 
Reactions: CentroX

Atari2600

Golden Member
Nov 22, 2016
1,409
1,655
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Why did Jim Keller already leave in 2015? Was he finished and happy, or was it something else behind the curtains?

As far as I know, the architectural work was done by that stage - and Zen was in the process of taping out prior to debugging for bringing it to market.

JK finds that side of it a bit boring, so moved on.


Undoubtly that Keller has a lot of credentials but Mark Papermaster is not to be underestimated, he s of the same level, roughly...

https://en.wikipedia.org/wiki/Mark_Papermaster

Besides Lisa Su has all necessary competences in semiconductors technology...

https://en.wikipedia.org/wiki/Lisa_Su

Yep - its what I've been saying (although probably stating it badly) - AMD assembled a small team of very skilled engineers and the chain from the lowest worker-bee right up to the CEO was uninterrupted by anyone technically incompetent in CPU design. Everyone will have their specialisms - but they have a good mix leading to strong decisions from the bottom right up to the boardroom. Even just considering the CEO and CTO.

Lisa Su --- Background in process
Mark Papermaster --- Background in architecture
Between the two of them, they'll be able to ask the right questions.


Over at Intel, the board are entirely process guys or marketeers (except possibly Rob Crooke, although his architecture background appears pretty light). It'd help explain why their tocks are pretty weak at the minute... although I suppose you'd wonder how the ticks are going wrong.
 

Atari2600

Golden Member
Nov 22, 2016
1,409
1,655
136
I hope the guy responsible for Bulldozer isn't still in an important position.

The high level thought train behind bulldozer actually wasn't *that* bad... Do your INT operations on the CPU and offload FP to the GPU.

Unfortunately, a bit like Barcelona, it was ahead of what processes could deliver at the time.


Consider what might happen 5 years or so down the line.... if you have an APU that has TFLOPS of FP performance in the GPU side, and you can leverage that in most software, you'd be crazy not to focus the CPU end on INT ops right?
 
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