New Zen microarchitecture details

[Arzachel]

@ itsmydamnation
Sure cost per mm2 might not be huge compared to retail ASPs but it's the principle while the few $ in OEM matter quite a bit. A 140mm2 8 cores die would have been more fun.
And then there are the 4 cores, in theory those could retail as low 50$ and a few $ make a big difference. Not saying they will sell at 50$, this year at least, but they could if they had a native die.
Hopefully they'll have more resources in the next years.

Gimping the performance of your server products to extract a couple of bucks out of a cheapo salvage part that's going to be phased out as soon as Raven Ridge is up seems incredibly short-sighted.

 

[imported_jjj]

Gimping the performance of your server products to extract a couple of bucks out of a cheapo salvage part that's going to be phased out as soon as Raven Ridge is up seems incredibly short-sighted.

Who said anything like that? You are creating your own imaginary narrative. I haven't even mentioned server so stick to the things that were actually said.

 

[raghu78]

So from the AMD Zen paper at ISSCC we have a Zen core at 5.5 sq mm against a Skylake core at 6.575 sq mm.

ZEN = 44 - 16 - (4 x 1.5) = 22 sq mm for 4 cores = 5.5 sq mm per core
SKYLAKE = 49 - 19.1 - (4 x 0.9) = 26.3 sq mm for 4 cores = 6.575 sq mm per core

Given that Intel has larger 256 bit AVX units while Zen uses 128 bit units, we can account for the larger size of Skylake. From this paper we can conclude that Zen is a pretty large core. Intel's supposedly superior transistor density is not evident at least from the L3 and L2 sizes. In fact AMD Zen's 8MB L3 cache at 16 sq mm is significantly smaller than Intel's 8MB L3 cache at 19.1 sq mm. Similarly AMD Zen's 512 KB L2 cache is 1.5 sq mm but Intel Skylake's 256 KB L2 cache is 0.9 sq mm. But I think Intel's design on average will clock 500 Mhz more than AMD's for both stock turbo and max OC. Intel's larger die size can be also attributed to use of larger transistors to drive more current and hit those 5 Ghz frequencies.

Anyway I am looking forward to Zen and a return to competition in the CPU market after a decade. 2017 is just the beginning. 2018 could be even more interesting. Skylake-X vs Zen+. I hope AMD goes for the kill. 10 cores, higher IPC and higher clocks. Bring out 125w SKUs but go for the crown. Let Raven Ridge handle the < USD 250 market.

 

[Arzachel]

Who said anything like that? You are creating your own imaginary narrative. I haven't even mentioned server so stick to the things that were actually said.

You know that Naples is pretty likely to be Ryzen dies in a MCM, right?

 

[CatMerc]

Using the numbers provided by AMD, I redid my die calculations:

: Die Pic One : (Dresdenboy)

CCX Total Area: 44mm^2
CCX Pixel Width: 315px
CCX Pixel Height: 164px
Ratio: 1.920x
CCX Width: 9.191mm
CCX Height: 4.787mm
mm/pixels: 0.02917
Image Width pixels: 701
Image Height pixels: 322
CPU Width: 20.448mm
CPU Height: 9.3927mm
Die size: 192mm^2



: Die Pic Two : (Chip-Architect.com)

CCX Total Area: 44mm^2
CCX Pixel Width: 183px
CCP Pixel Height: 285px
Ratio: 1.557x
CCX Width: 5.315mm
CCX Height: 8.276mm
mm/pixels: 0.0290
Die Width Pixels: 357px
Die Height Pixels: 643px
CPU Width: 10.353mm
CPU Height: 18.647mm
Die Size: 193mm^2

Both point to about 190mm^2 die size.

 

[krumme]

Absolutely spot on for Mathias (Dresdenboy) prior estimations it seems to me. Well done !

 

[majord]

http://www.eetimes.com/document.asp?doc_id=1331317&page_number=2

Maybe it's late and i'm missing something but i'm not entirely following the correlation between 6tr SRAM size for each process, and the actual L2 and L3 sizes. Why is Zen cache smaller?

 

[Mechanical Man]

True.
However I wouldn't say even if the actual improvement I allegedly measured was 31% or 125%.

Naturally, you could not say anything other than whats based on public figures. But i would want to believe, that your tone of presentation would be telling.

 

[Greyguy1948]

Yep. He expects Sandy Bridge level int performance and not much on fp.

And the 40% referred to int_rate... A Throughput bench. No different than what I said they might have done, looking at historical data.

"AMD has disclosed little useful performance data, but it provided guidance that Zen’s IPC is 40% better on SPECint_rate2006 than Excavator’s,"

Sent from HTC 10
(Opinions are own)

Well this is what we can see in Sisoft Sandra Multimedia. With almost the same clock:
AMD Eng Sample (8C/16T) Ivy Bridge (6C/12T)
Integer.............458...........................248
Float single.......348..........................313

40% improvement is best case and nothing else.
Why Zen for gaming?
Zen i perfect for video editing like 4K.

 

[Abwx]

Maybe it's late and i'm missing something but i'm not entirely following the correlation between 6tr SRAM size for each process, and the actual L2 and L3 sizes. Why is Zen cache smaller?

The obvious answer is that GF has higher density, also Intel s alleged number is not right, this is surely like they did with 22nm that is to publish size of low perfs cells that end being smaller once they publish the CPUs dedicated cells sizes.

 

[sm625]

Using the numbers provided by AMD, I redid my die calculations:



Both point to about 190mm^2 die size.

This is 20% smaller than polaris 10, which we know AMD is happily selling for under $100. (Well, probably not happily, but they're doing it.)

 

[raghu78]

This is 20% smaller than polaris 10, which we know AMD is happily selling for under $100. (Well, probably not happily, but they're doing it.)

Thats a die size smaller than the original Athlon X2 at 199 sq mm. Nice. Now AMD just price the 8C/16T SKUs at 400/500

http://techreport.com/review/8616/amd-athlon-64-x2-3800-processor

 

[hojnikb]

Can anyone compare these die size to skylake/kabylake 4c parts ?

 

[CatMerc]

Can anyone compare these die size to skylake/kabylake 4c parts ?

Skylake and Kaby Lake are 121mm^2 and ~130mm^2 respectively.
Remember that these include an iGPU and dual channel memory.

i7 6950x has quad channel memory and some transistors dedicated for fixed function logic for large companies (Google, Amazon). Ryzen has dual channel memory, but it also has Infinity Fabric links to communicate in an MCM configuration.

This means you can't really directly compare them, as they have parts of the die dedicated to serving different markets.
I would imagine that were a strictly consumer focused Ryzen was made, without the GMI links, it would be around 150mm^2.

 

[Glo.]

This is 20% smaller than polaris 10, which we know AMD is happily selling for under $100. (Well, probably not happily, but they're doing it.)

The GPU sold by AMD under 100$ is Polaris 11. Polaris 10 is 232 mm2, and is in RX 470/480. I have never seen it under 100$ .

 

[TemjinGold]

Using the numbers provided by AMD, I redid my die calculations:



Both point to about 190mm^2 die size.

So how many chips is that per wafer?

 

[Magic Hate Ball]

The GPU sold by AMD under 100$ is Polaris 11. Polaris 10 is 232 mm2, and is in RX 470/480. I have never seen it under 100$ .

I think he's counting removing the cost of RAM/heatsink/PCB. My coworker just got his son an RX480 Armor 4GB for $174 the other day.

 

[CatMerc]

The GPU sold by AMD under 100$ is Polaris 11. Polaris 10 is 232 mm2, and is in RX 470/480. I have never seen it under 100$ .

That's the price for the end consumer, before the AIB cut, along with the PCB, memory, VRM, and cooler costs.
AMD can sell that GPU for max 80$.

So how many chips is that per wafer?

With 100% yield, it's ~300 dies. With yields taken into account, it's about ~250 dies.

 

[sm625]

The GPU sold by AMD under 100$ is Polaris 11. Polaris 10 is 232 mm2, and is in RX 470/480. I have never seen it under 100$ .

No, Polaris 10 is $100. It has to be. Because the cards are selling for $200. Subtract the cost of 8GB GDDR5, pcb, heatsink, fan, VRMs, caps, coils, metalwork, etc, and Polaris 10 has to be $100 or less or the AIB vendors arent making any money! Polaris 11 is probably $40.

 

[KTE]

Now your just throwing conjecture to match your agenda, in no instance has David kanter said AMD have told him any IPC numbers specifically ..... given AMD have said much later on that they exceeded 40% and the CPC benchmarks align as well as the AMD shown benchmarks you need to rethink your position.

And now you're saying DK just randomly made up 40% is SPEC int rate because it suits you to disregard that.

Why don't you ask him if you're after facts?

The article has been around for months but was paid only. Today it's been opened up free so being linked from Twitter onwards.

Kanters prediction:

Ivy Bridge level overall.
Stronger in int than fp.

He has shown to have a far more accurate, knowledgeable and balanced opinion about mainstream processors over the past 15 years than anyone else.

Altho I don't quite follow him with some matters (LRB/Itanium), technically, he always had reasonable justifications.

Sent from HTC 10
(Opinions are own)

 

[CatMerc]

And now you're saying DK just randomly made up 40% is SPEC int rate because it suits you to disregard that.

Why don't you ask him if you're after facts?

The article has been around for months but was paid only. Today it's been opened up free so being linked from Twitter onwards.

Kanters prediction:

Ivy Bridge level overall.
Stronger in int than fp.

He has shown to have a far more accurate, knowledgeable and balanced opinion about mainstream processors over the past 15 years than anyone else.

Altho I don't quite follow him with some matters (LRB/Itanium), technically, he always had reasonable justifications.

Sent from HTC 10
(Opinions are own)

He claims what he was told by AMD, not that he has any sources for benchmarks.

Remember that this was before AMD confirmed they've surpassed the 40% IPC target.

 

[krumme]

Lol on repeat

 

[inf64]

He claims what he was told by AMD, not that he has any sources for benchmarks.

Remember that this was before AMD confirmed they've surpassed the 40% IPC target.

He also claims for some reason that 40% figure refers to spec_rate (int) and not to ST uplift Vs XV core. From Hot Chips Q&A session with Mr.Clark we found out 2 things:

1) ~40% IPC improvement refers to one thread improvement vs previous gen core (XV)

2) SMT comes on top of that, AMD didn't want to reveal the actual throughput gain, I personally expect around ~20% gain Vs intel's 25% gain on post IB cores.

 

[TemjinGold]

That's the price for the end consumer, before the AIB cut, along with the PCB, memory, VRM, and cooler costs.
AMD can sell that GPU for max 80$.


With 100% yield, it's ~300 dies. With yields taken into account, it's about ~250 dies.

Thanks.

 

[AtenRa]

Nice,

Even with the Polaris 11 GPU a Quad Core RavenRidge APU will be sub 200mm2.