NV 4060 / 4060TI reviews

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Mopetar

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Jan 31, 2011
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They don’t even need to do it for each game. Just pick five titles and do a more in-depth look at those. They could pick a shooter, a racer, etc. to get a good mix of titles. Some of their more recent reviews have done that when showing where 8 GB of VRAM results in lower texture quality or stuttering.
 

Heartbreaker

Diamond Member
Apr 3, 2006
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If time wasn't a factor there would be a lot of settings to test for each game. And a visual comparison of these settings. Obviously too much work and often pointless to include in a round up. But each time a new game comes out it is interesting to see.

IMO, just doing that for one game, can be it's own long video.

HWUB has done "Optimized" guides for games like this, where they explore the impact of various settings:


I think this kind of tinkering makes more sense in this setting, than in GPU reviews.
 

jpiniero

Lifer
Oct 1, 2010
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dlerious

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Mar 4, 2004
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Seems there might not be reviews of the 16 GB.
I'd be surprised if Hardware Unboxed or Gamers Nexus didn't purchase one for review.
 

coercitiv

Diamond Member
Jan 24, 2014
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Turns out Nvidia's plan to ensure 4060Ti sales is to have reviewers buy the 16GB SKU by themselves. This also answers my curiosities about their marketing plans, apparently they'll cover the 4060TI in non-reflective coating to minimize the card's consumer radar cross-section.
 

MrTeal

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Dec 7, 2003
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I'd be surprised if Hardware Unboxed or Gamers Nexus didn't purchase one for review.
At this point people are waiting to dunk on the card, so their video reviews will be pretty profitable just from people wanting to point, laugh and say "I knew it!"
 

Heartbreaker

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Seems there might not be reviews of the 16 GB.

They might take longer, but there will be reviews, and they will highlight it as "The Review NVidia didn't want you to see" or something like that.

Because everyone knows the outcome, take a card with terrible perf/$ and make it $100 more expensive at the same performance, just makes it that much worse.

I wonder if NVidia is just releasing it (on the backs of the AIBs), to later say, "We made a 16GB card and it sold worse, therefore 8GB is enough".
 

Mopetar

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Jan 31, 2011
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16 GB isn't going to change the cases where it loses to the 3060 Ti because of the smaller bus and lower memory bandwidth. The memory on the 4060 Ti is even slower than the refreshed 3060 Ti from last year. If they were going to charge an extra $100, they should have at least used faster VRAM so it gets a performance bump.
 

jpiniero

Lifer
Oct 1, 2010
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16 GB isn't going to change the cases where it loses to the 3060 Ti because of the smaller bus and lower memory bandwidth. The memory on the 4060 Ti is even slower than the refreshed 3060 Ti from last year. If they were going to charge an extra $100, they should have at least used faster VRAM so it gets a performance bump.

The point of the 16 GB was really to shut up the 8 GB haters for a bit. nVidia never intended for it to sell in volumes. I thought that perhaps they would just cancel it, but no, it looks like we will get something.

NV could have given it faster memory but it would mean it would cost an extra 8x however much more the faster memory costs. Not to mention the additional validation since this spec probably already existed in the form of a Quadro.
 

MrTeal

Diamond Member
Dec 7, 2003
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Has anyone seen a die shot of AD106 or AD107 with the area of the MC highlighted for size? Some brief searching didn't turn it up.
It'd be interesting to see what the area cost would have been to give AD106 a 192bit bus. That would give it the same bus width as AD104 and they could have done 12GB, but they'd still be able to differentiate between it and the 4070 since it's not a GDDR6X part. That would have been a lot more impactful than tossing 16GB clamshelled on a 128bit bus, and probably would be a lower total BOM as well.
 
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jpiniero

Lifer
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That would have been a lot more impactful than tossing 16GB clamshelled on a 128bit bus, and probably would be a lower total BOM as well.

The 16 GB was a last second throwaway product.

What they could have done is perhaps new Ampere SKUs instead of the desktop 4060/Ti. But they didn't.
 
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blckgrffn

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May 1, 2003
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www.teamjuchems.com
Has anyone seen a die shot of AD106 or AD107 with the area of the MC highlighted for size? Some brief searching didn't turn it up.
It'd be interesting to see what the area cost would have been to give AD106 a 192bit bus. That would give it the same bus width as AD104 and they could have done 12GB, but they'd still be able to differentiate between it and the 4070 since it's not a GDDR6X part. That would have been a lot more impactful than tossing 16GB clamshelled on a 128bit bus, and probably would be a lower total BOM as well.

My guess is the L2 cache is tied to the memory controllers. So rather than coming up with some custom layout for that, they just clipped it to 128 bit. Otherwise they would have been committing too much silicon to the cause. That's my hypothesis.

As I mentioned before, IMOP overall it would have benefited from a smaller L2 and a bigger bus width that allowed for a 12GB card with actual memory bandwidth AND a marked increase in cahce hits vs Ampere. It would have stayed a "better" card and not had any regressions but we are not worthy of this effort this gen. Watch for the next gen to drop this blessing upon us

Again, this is an AMAZING $250 4050Ti Or $199!?!?!?!? Wow
 

TESKATLIPOKA

Platinum Member
May 1, 2020
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My guess is the L2 cache is tied to the memory controllers. So rather than coming up with some custom layout for that, they just clipped it to 128 bit. Otherwise they would have been committing too much silicon to the cause. That's my hypothesis.
Unlikely.
Both AD106 and AD107 have 128-bit bus, yet one has 24MB L2 cache and the other 32MB.
 

TESKATLIPOKA

Platinum Member
May 1, 2020
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Full die of AD107 has 32 MB. The desktop 4060 does indeed only have 24 MB enabled but the 4060 Laptop has the full amount.
From where did you get this info? I didn't find anything about It on Nvidia's webpage, only Wiki, but they also used TPU database as source.
GPU-Z also doesn't show the amount of L2 cache, unless I am blind.
It could be true based on the fact that AD102 has physically 96MB, AD103 has 64MB and AD104 has 48MB.

edit: @jpiniero So we are not sure how much cache AD107 really has, right?
 
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DeathReborn

Platinum Member
Oct 11, 2005
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My guess is the L2 cache is tied to the memory controllers. So rather than coming up with some custom layout for that, they just clipped it to 128 bit. Otherwise they would have been committing too much silicon to the cause. That's my hypothesis.

As I mentioned before, IMOP overall it would have benefited from a smaller L2 and a bigger bus width that allowed for a 12GB card with actual memory bandwidth AND a marked increase in cahce hits vs Ampere. It would have stayed a "better" card and not had any regressions but we are not worthy of this effort this gen. Watch for the next gen to drop this blessing upon us

Again, this is an AMAZING $250 4050Ti Or $199!?!?!?!? Wow

The L2 sits between the TPC's (SM Clusters), it's not tied to the MC's.

 

Heartbreaker

Diamond Member
Apr 3, 2006
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First Asus 16GB 4060 Ti shown. I bet it costs as much as a base model 4070:

 

Heartbreaker

Diamond Member
Apr 3, 2006
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If this is the real board, they must have mounted the extra memory on the back, which is a potential cooling issue:
 

MrTeal

Diamond Member
Dec 7, 2003
3,606
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If this is the real board, they must have mounted the extra memory on the back, which is a potential cooling issue:
Even though there's lots of space around the GPU, all boards that have two chips per memory controller will have to be clamshelled with half the chips on the back side. There's an impedance cost to split the signals to another chip directly below the top one, but it's much less than splitting the signals and running them to two chips side by side. Routing is much easier clamshell as well.
 

Heartbreaker

Diamond Member
Apr 3, 2006
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Even though there's lots of space around the GPU, all boards that have two chips per memory controller will have to be clamshelled with half the chips on the back side. There's an impedance cost to split the signals to another chip directly below the top one, but it's much less than splitting the signals and running them to two chips side by side. Routing is much easier clamshell as well.

If you can route 8 (or more) full channels on one side of the board, you can more easily route 8 half channels.

IMO, it's just laziness. Instead of completely rerouting the board (a complete redesign), they can just use the current routing or minimally changed and just sink routes through the board at current locations. This makes sense from a time/costs savings perspective, but is a negative for VRAM cooling.

I bet if this was planned from day one, they would have routed them all on the GPU side.
 
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