Official AMD Ryzen Benchmarks, Reviews, Prices, and Discussion

[lolfail9001]

TAM for 4C/8T+ iGPU is much bigger than for 4C/8T only CPU.

But TAM for 4c/8t + very beefy power hungry iGPU is much smaller than TAM for 4c/8t + small iGPU that is good enough for light tasks and video decoding. Like your firm is their entire TAM in this case.

AMD will sell much more APUs this year than 4C/8T CPUs, only.

I never argued with that point.

P.S. Are you sure, that having technology advantage over Intel is not being in position to experiment with technology?

Technology advantage? In what form? And please, don't ramble about Vega "efficiency" until we know how much of it is plain marketing BS. AMD's marketing has earned the reputation to never be trusted already.

Think about how much faster will be Vega with 1024 GCN cores, with access to HBM2 over Intel best offerings here .

And i think how much cheaper for everyone it will be to design same cookie cutter APU AMD has designed since Bobcat and Llano and how much cheaper it will be to just glue together 2 Snowy Owls and few Vega GPUs.

 

[Glo.]

But TAM for 4c/8t + very beefy power hungry iGPU is much smaller than TAM for 4c/8t + small iGPU that is good enough for light tasks and video decoding. Like your firm is their entire TAM in this case.

I never argued with that point.

Technology advantage? In what form? And please, don't ramble about Vega "efficiency" until we know how much of it is plain marketing BS. AMD's marketing has earned the reputation to never be trusted already.

And i think how much cheaper for everyone it will be to design same cookie cutter APU AMD has designed since Bobcat and Llano and how much cheaper it will be to just glue together 2 Snowy Owls and few Vega GPUs.

Why do you people consider that APUs are only for web browsing, video decoding?

Revise your believ about how fast will be that APU. You are messing with whole idea, and the point of the APU, and the reason why AMD bought ATI. 16CU+ HBM2 will be at least 25% faster than 16 CU Polaris GPU. AT LEAST. Is this not having technology advantage over Intel?

The APU will get use in server market, Machine Learning, Embedded markets, Gaming, Small-Form Factor, Mobile, etc.

 

[Agent-47]

Hmm, if ryzen really scales with memory frequency, then I am glad I got some fast DDR4. I know with X99 it makes little difference; my 2667 MHz is fine, especially with quad channel, but now I am glad I got 3200 MHz and I wonder if even faster would help.

This review shows how performance scales with memory overclock.

 

[french toast]

Technology advantage? In what form? And please, don't ramble about Vega "efficiency" until we know how much of it is plain marketing BS. AMD's marketing has earned the reputation to never be trusted already.
.

Be honest now, you didnt seriously type that out with a straight face? Surely not.

Intel has many advantages in technology over AMD but graphics certainly isn't one of them, intels graphics ip is in the dark ages in comparison, Vega will be vastly more efficient than polaris you can be sure of that, but lets ignore vega and pretend RR will be using 2 generations old GCN 3, on 14nm vs HD720 it would be like putting 2017 era Royal marine commandos in with the zulus- yes the cow skin shielded 1879 variety. There simply is no comparison between Intel and AMD graphically.
IF RR goes with HBM 2, then apu wise they will be years ahead there as well.
I dont think that will happen though.

 

[nathanddrews]

Watercooled Overclock just posted early this morning.

 

[Glo.]

IF RR goes with HBM 2, then apu wise they will be years ahead there as well.
I dont think that will happen though.

One question. Why do you think that is the case?

 

[lolfail9001]

Why do you people consider that APUs are only for web browsing, video decoding?

Because i am yet to see an adequately priced APU that beats performance of 9 year old dGPU? I mean, Intel's GT3e and GT4 do it but their price tag ruins it.

Revise your believ about how fast will be that APU.

Revise your belief of how much power that one will consume.

You are messing with whole idea, and the point of the APU, and the reason why AMD bought ATI.

I always thought AMD bought ATI because they had more money than brains at the time.

16CU+ HBM2 will be at least 25% faster than 16 CU Polaris GPU.

Prove RX460, the 1024 edition is memory limited, because you are not going to see a single percent of performance gain otherwise.

Is this not having technology advantage over Intel?

Yes, because so far it has not materialized in any sensible form. Just because you said it will be 25% faster does not mean it will.

The APU will get use in server market, Machine Learning, Embedded markets, Gaming, Small-Form Factor, Mobile, etc.

For machine learning/server market AMD went with idea of just making a node of 2 Snowy Owls and 2 (or was it 4 or 8, does not matter) Vega dGPUs, no need for separate design in any capacity. By the way, AMD couples 1 HBM2 stack with 32 CUs, just informing you.
That leaves us with embedded/SFF/Mobile. For all 3 you need to prove power efficiency, need in performance. For the best selling mobile market, laptops in mid-range, you also need that you can cool that monster with a single piece of bubblegum.

 

[psolord]

Has anyone benchmarked Forza Horizon 3 on Ryzen?

My 2500k@4.8Ghz could not max out my 1070 (noMSAA) due to cpu limits.

 

[french toast]

One question. Why do you think that is the case?

I have already explained my reasons.

 

[Glo.]

Because i am yet to see an adequately priced APU that beats performance of 9 year old dGPU? I mean, Intel's GT3e and GT4 do it but their price tag ruins it.

How fast is 1024 GCN core Polaris GPU compared to 9 year old GPU?

Revise your belief of how much power that one will consume.

Up to 95W TDP. 35W Mobile Eng Sample, that is floating around with 4C/8T+11 CU is 35W.

Prove RX460, the 1024 edition is memory limited, because you are not going to see a single percent of performance gain otherwise.

This shows that you have not read exactly what Vega is improving, and changing vs previous versions of GCN.

Prove RX460, the 1024 edition is memory limited, because you are not going to see a single percent of performance gain otherwise.

25% you get JUST FROM Tile Based Rasterization. Without all other improvements in the architecture, and increased IPC of Vega.

For machine learning/server market AMD went with idea of just making a node of 2 Snowy Owls and 2 (or was it 4 or 8, does not matter) Vega dGPUs, no need for separate design in any capacity. By the way, AMD couples 1 HBM2 stack with 32 CUs, just informing you.
That leaves us with embedded/SFF/Mobile. For all 3 you need to prove power efficiency, need in performance. For the best selling mobile market, laptops in mid-range, you also need that you can cool that monster with a single piece of bubblegum.

If you are dividing 64 CU design by 2 stacks of HBM2, than you again appear to not fully understand how it works.

Let me give you all a hint. There is very good reason why all of engines in the GPU are decoupled from Memory controller, and are clients with L2 cache right now. There is a very good reason why Raja says that Memory bandwidth is more important for Vega, than actual size of the Memory. Why?

Because it is on hardware level compliant with HSA 2.0 Unified Memory spec. I suggest you all digging down a bit about Vega, and how it works .

P.S. IMO 1024 GCN core Vega, with 1.5 GHz can be as fast as RX 470 4 GB, while consuming 50% of power, because the architecture is able to achieve higher clocks while using the same amount power as previous generation of GCN.

 

[lolfail9001]

How fast is 1024 GCN core Polaris GPU compared to 9 year old GPU?

You did not specify bandwidth.

Up to 95W TDP. 35W Mobile Eng Sample, that is floating around with 4C/8T+11 CU is 35W.

95W TDP if i leave about 25-30W to CPU means 65-70W TDP for GPU... You could go far on that one, but not above stock rx460 imho, and that would require HBM. For rx460 performance. Yeah, i'll pass.

This shows that you have not read exactly what Vega is improving, and changing vs previous versions of GCN.

All i need to know is that AMD chose to tout the most meaningless (in general gaming) changes, and that tells me everything i need about other changes, like...

25% you get JUST FROM Tile Based Rasterization. Without all other improvements in the architecture, and increased IPC of Vega.

Source that number, i dare you. Also, all GPUs since at least Tesla gen 1 have IPC of 1 FMA/clock.

If you are dividing 64 CU design by 2 stacks of HBM2, than you again appear to not fully understand how it works.

I understand how it works, but that's how AMD describes it, last time i read that pdf.

There is a very good reason why Raja says that Memory bandwidth is more important for Vega, than actual size of the Memory.

They said the same about Fiji, and i'll give them props, they did not lie, they worked around the issue of volume pretty well. So well, they ran with it second time in a row with Vega!

Because it is on hardware level compliant with HSA 2.0 Unified Memory spec. I suggest you all digging down a bit about Vega, and how it works .

All i know is that HSA is presently in status of undead in consumer market. And that's about all any of us will need to know about it for time to come.

P.S. IMO 1024 GCN core Vega, with 1.5 GHz can be as fast as RX 470 4 GB, while consuming 50% of power, because the architecture is able to achieve higher clocks while using the same amount power as previous generation of GCN.

So, you claim that Vega is 2x more power efficient than Polaris? gr8 b8 m8, i r8 it 8/8. No, seriously, that is just baiting.

 

[krumme]

Managed to go from 2666 C16 17 17 17 35 to 2933 C16 16 16 16 33 - both stock 1.35V (its on the cheapest ddr4 ram i could get: 2*8GB corsair vengence lpx 3000 c15)
- using tighter settings was needed to go there. Damn counter intuitive. We clearly need bios updates with the memory profiles - its borked as it is. Couldnt get past 2133 on the bios i had 2 days ago.
Each day new performance lol

Winning all fights in BF1 - even with the worst hangover. Clearly its the magic from Jim Keller. I tell you.

 

[Mechanical Man]

Mechanical Man Its the old know guy Sampsa, overclocker?

"Old". Yeah Sampsa Kurri, the one who had muropaketti.com, but due to some recent events now started new site io-tech.fi.

 

[french toast]

I know both Ryzen and vega are both designed for HBM, using infinity fabric/GMI links. I also think an APU is coming soon that uses all of those technologies, if it does then it will use 2GB of HBM2, with significantly less than 200gb/s bandwidth, HBCC will ensure up to 4GB of graphics memory can be used with very little performance penalty vs 4GB vram.
This is technically possible and cost effective to be doing this with Raven Ridge in terms of BOM/die cost.
My only concern is the engineering man hours required to put together this ambitious architecture might be beyond AMDs budget this year, with Ryzen, ryzen 2, Naples, Vega 10 11?, polaris refresh, software optimisations and likely manymore projects ive missed, thats alot of engineering there with a finite amount of engineers to cover them, whilst keeping quality control and time constraints in check.
We have already seen evidence of this difficulty with the rushed rx480 and ryzen launches.

My argument is not that it is not feasible or that AMD dont have the intention to use HBM with APUs, its i dont think its a priority over many other projects.
AMD will still have a graphics lead in APUs without it.

 

[Glo.]

95W TDP if i leave about 25-30W to CPU means 65-70W TDP for GPU... You could go far on that one, but not above stock rx460 imho, and that would require HBM. For rx460 performance. Yeah, i'll pass.

35W 4C/8T+11 CU Mobile mobile Eng Sample(12 CU design, but one CU disabled) has 3.0/3.3 GHz core clocks, on CPU. Polaris 11(full, 1024 GCN cores) uses 18W of power, at 907 MHz(just for the GPU). We have tested this, Adored TV, have tested this with Polaris 11(14 CU design) declocked to 850 Mhz and the numbers are pretty in line. Rest of 35W TDP for Radeon Pro 460(the GPU we have tested in MBP) is consumed by Memory of the GPU(4 GDDR5 memory cells). Radeon Pro GPUs are power gated by their BIOS'es in the OS. So this kinda puts this for you all in a little picture.

So, you claim that Vega is 2x more power efficient than Polaris? gr8 b8 m8, i r8 it 8/8. No, seriously, that is just baiting.

At 1.5 Ghz - yes, it can be. But Im pretty sure that is not the core clock we will see in Top end APU. Like I have said, Vega is optimized to get higher core clocks at the same TDP as previous generation GCN.

IMO top end, 95W APU will have 3.4/3.6 GHz core clock, and 1250-1350 MHz with HBM2. We are looking at at least GTX 1050 Ti regions of performance, which is actually not that bad, at all.

If this is priced at 199$ it is genuinely bargain of the century.

 

[Glo.]

I know both Ryzen and vega are both designed for HBM, using infinity fabric/GMI links. I also think an APU is coming soon that uses all of those technologies, if it does then it will use 2GB of HBM2, with significantly less than 200gb/s bandwidth, HBCC will ensure up to 4GB of graphics memory can be used with very little performance penalty vs 4GB vram.
This is technically possible and cost effective to be doing this with Raven Ridge in terms of BOM/die cost.
My only concern is the engineering man hours required to put together this ambitious architecture might be beyond AMDs budget this year, with Ryzen, ryzen 2, Naples, Vega 10 11?, polaris refresh, software optimisations and likely manymore projects ive missed, thats alot of engineering there with a finite amount of engineers to cover them, whilst keeping quality control and time constraints in check.
We have already seen evidence of this difficulty with the rushed rx480 and ryzen launches.

My argument is not that it is not feasible or that AMD dont have the intention to use HBM with APUs, its i dont think its a priority over many other projects.
AMD will still have a graphics lead in APUs without it.

APU is the priority project. I do not believe any of you can comprehend how important it is for HSA 2.0 and future iterations, how it is important for AMD.

They have to create somehow the need for APUs to adopt everywhere. The best way for this is to make APUs as fast as possible, as efficient as possible. Only way to do this is by coupling Ryzen CPU, with Vega GPU, and adding HBM2 on top of it.

Im not sure however what Bandwidth we will see. We might see only 256 GB/s APU, this year.

 

[JDG1980]

I know both Ryzen and vega are both designed for HBM, using infinity fabric/GMI links. I also think an APU is coming soon that uses all of those technologies, if it does then it will use 2GB of HBM2, with significantly less than 200gb/s bandwidth, HBCC will ensure up to 4GB of graphics memory can be used with very little performance penalty vs 4GB vram.
This is technically possible and cost effective to be doing this with Raven Ridge in terms of BOM/die cost.
My only concern is the engineering man hours required to put together this ambitious architecture might be beyond AMDs budget this year, with Ryzen, ryzen 2, Naples, Vega 10 11?, polaris refresh, software optimisations and likely manymore projects ive missed, thats alot of engineering there with a finite amount of engineers to cover them, whilst keeping quality control and time constraints in check.
We have already seen evidence of this difficulty with the rushed rx480 and ryzen launches.

My argument is not that it is not feasible or that AMD dont have the intention to use HBM with APUs, its i dont think its a priority over many other projects.
AMD will still have a graphics lead in APUs without it.

Although I'd like to see HBM APUs as soon as posssible, I agree it might be too much to cram into the schedule this year.

Just getting APU performance up to Cape Verde levels will enable 1080p@60Hz smooth gaming on CS:GO and Dota 2, which are the two top-ranking games on Steam. Existing APUs (except Iris Pro) can't do that. Raven Ridge should have no trouble equaling Cape Verde even without HBM; memory compression technology has come a long way, and dual channel DDR4-3600 would provide 80% of the memory bandwidth of HD 7770 GHz Edition.

HBM APUs will probably come with the next generation in 2018. How they are designed depends a lot on the relative cost of various components. Is the interposer the expensive part, or the HBM stacks themselves? If interposers are cheap and HBM is expensive, I can see them having as little as one 1GB stack, which would be a shared GPU high-bandwidth cache and CPU L4 cache. This kind of arrangement is supposed to be supported by Ryzen and Vega, based on my understanding of "Infinity Fabric". If the interposer is the expensive part and adding extra HBM doesn't cost that much, we might see 8GB or even 16GB that would take the place of system RAM entirely (no need for external DIMMs).

I'd expect Apple to be the biggest customer for HBM APUs, so what we get may depend a lot on what they want as well. Microsoft might also be interested for the Surface Book / Surface Pro if the TDP can be gotten low enough with competitive performance.

 

[Glo.]

One thing is to understand how Vega works.

If we will get for example mITX board, with PCIe 3.0 x16 lane, and APU with HBCC, but without HBM2 on the die, lets say we are looking at 4C/8T+12 CU design/65W, and after a while we decided to buy Vega 11 GPU(lets say 48 CU GPU, with 8 GB's of HBM2) to couple with that, total CU count available to us is 60, and ALL of them have access to HBM2 on the GPU, because of the HBCC. It is inherent part of the architecture, and it will be in the designs regardless if they will have HBM2 or not, on the package.

That is the magic of this hardware.

 

[french toast]

APU is the priority project. I do not believe any of you can comprehend how important it is for HSA 2.0 and future iterations, how it is important for AMD.

They have to create somehow the need for APUs to adopt everywhere. The best way for this is to make APUs as fast as possible, as efficient as possible. Only way to do this is by coupling Ryzen CPU, with Vega GPU, and adding HBM2 on top of it.

Im not sure however what Bandwidth we will see. We might see only 256 GB/s APU, this year.

Im 60/40 on it, i hope your right.
In anycase the gpu certainly has no need for a wasteful 256 gb/s bandwidth, on a 1050TI level gpu? That would be daft, expensive and cost far too much power consumption, HBM can be very power efficient in low quantities yes, but its also not free, its inclusion has to be tempered against the fact current APUs have no power budget set aside for VRAM and they are already power constrained, 14nm increases both power and thermal envelope yes but the cpu and gpu need a huge chunk of that, thats why i expect something like a 2 hi stack (2 GB) clocked much lower than the maximum rated speeds, probably 96 - 128GB/S or something would be more than enough whilst being crazy efficient, anymore than that will achieve diminishing returns imo.

 

[unseenmorbidity]

Watercooled Overclock just posted early this morning.

Shockingly Jay did one of the best reviews somehow...

 

[PotatoWithEarsOnSide]

If the interposer is the expensive part and adding extra HBM doesn't cost that much, we might see 8GB or even 16GB that would take the place of system RAM entirely (no need for external DIMMs).

And if they succeded in doing this they'd be able to justify charging slightly more for it, given that the consumer would otherwise have to purchase 8-16GB DDR4 on top. AMD would essentially be eating into the DDR4 market as a surce of extra funds.

 

[Glo.]

Im 60/40 on it, i hope your right.
In anycase the gpu certainly has no need for a wasteful 256 gb/s bandwidth, on a 1050TI level gpu? That would be daft, expensive and cost far too much power consumption, HBM can be very power efficient in low quantities yes, but its also not free, its inclusion has to be tempered against the fact current APUs have no power budget set aside for VRAM and they are already power constrained, 14nm increases both power and thermal envelope yes but the cpu and gpu need a huge chunk of that, thats why i expect something like a 2 hi stack (2 GB) clocked much lower than the maximum rated speeds, probably 96 - 128GB/S or something would be more than enough whilst being crazy efficient, anymore than that will achieve diminishing returns imo.

We are talking about Gaming. Not situations where Memory Bandwidth REALLY matters. Machine learning, and data analysis. It is completely different scenario. We still do not know also how much memory bandwidth is required for Vega to excel in gaming.

Even tho it may look like a waste, it genuinely depends how much improved is the throughput of the GPU, and having overkill memory bandwidth in situation where it does not cost that much, may not be a bad thing. For example having more than 512 GB/s of memory bandwidth from GDDR5 on Polaris 10 can be huge waste, because it costs so much power. Having the same amount of memory bandwidth, while using ounce of power, even on 16 CU may not be wasted. Everything depends on the picture we are looking at, and what scenario is on it.

 

[Bouowmx]

I am interested in AMD Raven Ridge, but is AMD really increasing the size of the integrated GPU that much? So far, AMD has gone from 400 to 512.

| Processor              | CPU cores                 | GPU shaders             | GFLOPS | Memory      |
|------------------------|---------------------------|-------------------------|--------|-------------|
| A8-3870K Llano         | 4 10h 3.0 GHz             | 400 TeraScale 2 600 MHz |    480 | 2 DDR3-1866 |
| A10-5800K Trinity      | 2 Piledriver 3.8-4.2 GHz  | 384 TeraScale 3 800 MHz |    614 | 2 DDR3-1866 |
| A10-6800K Richland     | 2 Piledriver 4.1-4.4 GHz  | 384 TeraScale 3 844 MHz |    648 | 2 DDR3-2133 |
| A10-7890K Kaveri       | 2 Steamroller 4.1-4.3 GHz | 512 GCN 2 866 MHz       |    887 | 2 DDR3-2133 |
| A12-9800 Bristol Ridge | 2 Excavator 3.8-4.2 GHz   | 512 GCN 3 1108 MHz      |   1135 | 2 DDR4-2400 |

 

[Glo.]

I am interested in AMD Raven Ridge, but is AMD really increasing the size of the integrated GPU that much? So far, AMD has gone from 400 to 512.

| Processor              | CPU cores                 | GPU shaders             | GFLOPS | Memory      |
|------------------------|---------------------------|-------------------------|--------|-------------|
| A8-3870K Llano         | 4 10h 3.0 GHz             | 400 TeraScale 2 600 MHz |    480 | 2 DDR3-1866 |
| A10-5800K Trinity      | 2 Piledriver 3.8-4.2 GHz  | 384 TeraScale 3 800 MHz |    614 | 2 DDR3-1866 |
| A10-6800K Richland     | 2 Piledriver 4.1-4.4 GHz  | 384 TeraScale 3 844 MHz |    648 | 2 DDR3-2133 |
| A10-7890K Kaveri       | 2 Steamroller 4.1-4.3 GHz | 512 GCN 2 866 MHz       |    887 | 2 DDR3-2133 |
| A12-9800 Bristol Ridge | 2 Excavator 3.8-4.2 GHz   | 512 GCN 3 1108 MHz      |   1135 | 2 DDR4-2400 |

512 GCN cores were on 28 nm process.

We are looking at 14 nm Process, with very dense Core design. 4C/8T CCX is less than 50 mm2. 16 CUs will be less than 130 mm2. 4C/8T+16 CU supposedly will be less than 230 mm2, without HBM(that is separate).

 

[french toast]

Although I'd like to see HBM APUs as soon as posssible, I agree it might be too much to cram into the schedule this year.

Just getting APU performance up to Cape Verde levels will enable 1080p@60Hz smooth gaming on CS:GO and Dota 2, which are the two top-ranking games on Steam. Existing APUs (except Iris Pro) can't do that. Raven Ridge should have no trouble equaling Cape Verde even without HBM; memory compression technology has come a long way, and dual channel DDR4-3600 would provide 80% of the memory bandwidth of HD 7770 GHz Edition.

HBM APUs will probably come with the next generation in 2018. How they are designed depends a lot on the relative cost of various components. Is the interposer the expensive part, or the HBM stacks themselves? If interposers are cheap and HBM is expensive, I can see them having as little as one 1GB stack, which would be a shared GPU high-bandwidth cache and CPU L4 cache. This kind of arrangement is supposed to be supported by Ryzen and Vega, based on my understanding of "Infinity Fabric". If the interposer is the expensive part and adding extra HBM doesn't cost that much, we might see 8GB or even 16GB that would take the place of system RAM entirely (no need for external DIMMs).

I'd expect Apple to be the biggest customer for HBM APUs, so what we get may depend a lot on what they want as well. Microsoft might also be interested for the Surface Book / Surface Pro if the TDP can be gotten low enough with competitive performance.

I agree, i like the idea as 1HI stack (1GB) used as an L4 cache, similar to intels crystal well, im not sure of the Latency benefits of HBM vs DDR4, remember HBM uses interposer and does not need PCI E which adds Latency, so it has to be better, i would like to to see some data on this.
Certainly it must incur more Latency than intels Crystalwell edram setup which is on die, this would be worse for cpu and compute, BUT its primary inclusion is for general graphics bandwidth, which would be 'just enough' whilst having 4x the volume of crystalwell, likely cheaper and more power/thermal efficient, again i would like to see some data on this.

The issue of whether 1GB of vram is enough is a tough question,HBCC would allow the effective vram to double to 2GB, intels crystalwell only has 256mb? Of memory but its much faster i think? Nevertheless that is enough to dramatically speed up the gpu so 2GB effective will offer massive benefits for sure.
The issue that might arise is the amount of bandwidth the HBCC needs to be effective? For instance if it needs 512gbs to enable 2x more textues streamed in from nand than there is vram (something like that?) then what is the effect of reduced bandwidth to this virtual memory allocation? Is it still 2x with little performance penalty vs physical vram or does the virtual vram benefits decrease with bandwidth?

I think HBM for system RAM is years away honestly.