***OFFICIAL*** Ryzen 5000 / Zen 3 Launch Thread REVIEWS BEGIN PAGE 39

[amrnuke]

Did someone take die shots?

What is the transistor count?

Did transistor density increase?

Nudes only come out later at night.

IMO # transistors per chiplet could have increased, bu I doubt "real" density has changed much. What I mean by real density is transistor density in the L3$ or used core areas. I suspect it's the same for various reasons, including that they'd be constrained because of faster clocks and heat density. If they increased density while also increasing clocks, without a process shrink, that would require serious thermal considerations and I'm not sure they've changed a whole lot on that front.

Calculated transistor density on the whole chiplet could have increased since every chip has some unused or underused silicon that perhaps they are now using.

I'm excited to see some NSFW die shots soon...

 

[MrTeal]

Zen3 is supposed to be soldered, so it might take slightly longer to get die shots. Hopefully soon.

 

[HurleyBird]

I'm going to make a prediction for gaming performance:

Rocket Lake will edge out Vermeer.

Cezanne will edge out Rocket Lake.

 

[Veradun]

I'm going to make a prediction for gaming performance:

Rocket Lake will edge out Vermeer.

Cezanne will edge out Rocket Lake.

At this point I'm pretty confused at all the painters. Who's APU and who's CPU?

 

[itsmydamnation]

So , having finally finished the anand review.

im both disappointed and amazed.

disappointed that Zen3 isnt really actually any wider in the front end or execution stages, or even load/store pipeline,
Amazed they pulled off ~20% IPC , higher clocks probably around the same transistor count on the same process at the same TDP.

it appears AMD have done an amazing job of increasing average performance without increasing peak performance ( on a per functional unit basis)

I am not aware of ever seeing a new CPU core like this, even P4 to Core2 they traded much wider core for clock speed ( obviously a big net win).

I wonder how the unit counters are going to handle this one

AMD have delivered by ineffect feeding the existing beast, not making a bigger beast. I look forward to a ~350 entry ROB, 6 alu Zen 5

 

[HurleyBird]

At this point I'm pretty confused at all the painters. Who's APU and who's CPU?

Cezanne is the Zen 3 APU.

 

[HurleyBird]

Linus calling AT out over at RWT.

> "SPEC Score per GHz - Higher is evidence of a more complex uArch"
> (plus A13 entry showing up out of nowhere)

The thing is, that whole sentence is complete and utter BS.

A higher score (per GHz) is not evidence of a more complex uArch. Not at all.

The #1 reason is - almost always - that the memory subsystem gets more done per cycle - not because it's "more complex", but simply because each cycle is longer due the the frequency being lower. Both because DRAM needs fewer cycles, but also because your caches run at lower frequency that allow for fewer cycles.

So if you don't do it at iso-frequency, the number is completely meaningless blathering.

And even at iso-frequency, it's still generally meaningless, because the L1 and L2 (and often L3) access latencies have been tuned for the frequency the chip could run at, not the one it actually does run at. So under-clocking a 5GHz chip to 2GHz isn't a valid thing to do if the intent is to compare performance.

I've ranted against this idiocy for years. This is a pet peeve of mine.

(And all the same arguments are true for the "performance per watt" measures, which are only really sensible if the performance is comparable).

 

[Antey]

Linus calling AT out over at RWT.

oh yes, andrei and his beloved 'PPC'. it had to be there

 

[kawi6rr]

I am surprised a little by the results, I figured they would be good but I didn't expect them to be this good. Looks like I'll have to do an upgrade this time around even though I don't really need it.

 

[amrnuke]

I look forward to a ~350 entry ROB, 6 alu Zen 5

While AMD are using leapfrogging teams, they clearly heavily collaborate on many fronts, and an AM5 Zen4 release with a wider core and wearing N5 EUV clothes seems reasonable!

 

[JoeRambo]

This BIOS feature is a game changer for overclocking AMD. Especially x SKU's with their high SC boost. I really hope this becomes a standard bios feature. I'm hoping my crosshair 8 will get this feature in a BIOS update. This eliminates all of the risks and compromises of all core and CCX overclocking. I've been waiting for them to do something like this for a long time.

Outright amazing stuff! Ingenious job by ASUS. Feature like this should be on every single motherboard.

I had to check the window to see if any pigs were flying, cause this is on the level of eating infinite proverbial cake.

 

[amrnuke]

Linus calling AT out over at RWT.

Just keep in mind that the section of the AT article in question is not written by Dr Cutress.

I think there is still a perception and a bias out there that ARM/Apple are "smarter" and x86/Intel/AMD are "brute-force wrecking balls," and that bias shows through in that section.

Check out the response to Linus. "I haven't had complaints", "higher IPC/PPC is a sign of a wider [true] and more complex [untrue] design overall". Andrei's defensiveness and response completely ignores that Iso-frequency comparisons won't reveal anything because Intel and AMD design their pipelines to work best at higher frequencies and Apple/ARM design theirs to work best at relatively lower frequencies.

This statement "The whole thing is supposed the brainiac vs speed demon approach" reveals his bias. There is no brainiac vs speed demon approach. ARM and Apple don't reach 4+ GHz and therefore they must design their pipelines to maximize throughput at slower speeds. Intel and AMD CAN reach those speeds and have found that the combination of higher speed, relatively lower SPEC per GHz, and the scalability to many cores works for them.

Andrei keeps using this "oh but Apple A13 is +64% vs +67%? that's what we're fighting over"? No, A13 loses to the 5600X by 20% in SPECint2006. Once Apple can design a chip that beats the 5600X then we can talk. Apple probably CAN design a nice fast chip. But they haven't. Defending the A13 is a loser's battle when we're talking about desktop CPUs.

However, I appreciate Andrei's other response:

How is it misleading? It's exactly what people here have been asking for. AMD has promised a 19% IPC update, and because we've been flamed endlessly about using the IPC term in articles without *actually* measuring the actual IPC figure with performance counters we've resorted to PPC, in this case simply the score per clock. We're using the same binaries on the x86 platforms so they're directly translatable to IPC between the microarchitectures.

The actual absolute performance figures are above the PPC graphs. If you don't like the PPC graphs in the face of lacking profiled IPC figures, then just ignore them. The whole point of that was to get down to this sentence:

> "AMD’s marketing numbers are thus pretty much validated as they’ve exactly hit their proclaimed figure with the new Zen3 microarchitecture."

People will whine about IPC, people will whine about PPC/performance per clock. Whatever.

This is all he needed to say. It's 100% correct.

 

[gdansk]

Linus calling AT out over at RWT.

It seems Linus never changes. But he has a point. That metric leads or points people to extrapolations that no company has any delusions of pursuing.

 

[inf64]

The "Multikill" title is sooo fitting

Steve from GN

 

[HurleyBird]

It seems Linus never changes. But he has a point. That metric leads or points people to extrapolations that no company has any delusions of pursuing.

Got a good chuckle after clicking the link

 

[Carfax83]

So , having finally finished the anand review.

im both disappointed and amazed.

disappointed that Zen3 isnt really actually any wider in the front end or execution stages, or even load/store pipeline,
Amazed they pulled off ~20% IPC , higher clocks probably around the same transistor count on the same process at the same TDP.

it appears AMD have done an amazing job of increasing average performance without increasing peak performance ( on a per functional unit basis)

I am not aware of ever seeing a new CPU core like this, even P4 to Core2 they traded much wider core for clock speed ( obviously a big net win).

I wonder how the unit counters are going to handle this one

AMD have delivered by ineffect feeding the existing beast, not making a bigger beast. I look forward to a ~350 entry ROB, 6 alu Zen 5

This about sums up my thoughts quite well. As a gamer and hardware enthusiast, a lot of the tech improvements listed in the AT article flew over my head. I am struggling to understand how AMD increased performance so substantially without adding extra units

What about the SiSoft Sandra benchmarks that came out last week and showed Zen 3 having a huge performance uplift in vectorized SIMD, which alluded to an extra SIMD unit and FMA?

How the *expletive* did they get such a big performance increase without making the architecture wider?

 

[Carfax83]

Linus calling AT out over at RWT.

He did end up making a benchmark chart that included Graviton2 and A13 in Spec2006. Milan is going to be a monster!

 

[inf64]

This about sums up my thoughts quite well. As a gamer and hardware enthusiast, a lot of the tech improvements listed in the AT article flew over my head. I am struggling to understand how AMD increased performance so substantially without adding extra units

What about the SiSoft Sandra benchmarks that came out last week and showed Zen 3 having a huge performance uplift in vectorized SIMD, which alluded to an extra SIMD unit and FMA?

How the *expletive* did they get such a big performance increase without making the architecture wider?

Number of both L/S and Fp ports are 50% higher

 

[Hitman928]

This about sums up my thoughts quite well. As a gamer and hardware enthusiast, a lot of the tech improvements listed in the AT article flew over my head. I am struggling to understand how AMD increased performance so substantially without adding extra units

What about the SiSoft Sandra benchmarks that came out last week and showed Zen 3 having a huge performance uplift in vectorized SIMD, which alluded to an extra SIMD unit and FMA?

How the *expletive* did they get such a big performance increase without making the architecture wider?

But seriously. . .

magic.

 

[HurleyBird]

I wonder why libquantum is so fast? Always love seeing speedups in A* too since that one has the most real world significance for me.

 

[DarthKyrie]

But seriously. . .

magic.

You forgot to include the unicorn farts and pixie dust.

 

[jpiniero]

This about sums up my thoughts quite well. As a gamer and hardware enthusiast, a lot of the tech improvements listed in the AT article flew over my head. I am struggling to understand how AMD increased performance so substantially without adding extra units

What about the SiSoft Sandra benchmarks that came out last week and showed Zen 3 having a huge performance uplift in vectorized SIMD, which alluded to an extra SIMD unit and FMA?

Forget where I saw it, but the chiplets do have 6% more transistors and is about that much bigger.

 

[Carfax83]

Number of both L/S and Fp ports are 50% higher

Does that mean that Zen 2 must have had serious architectural bottlenecks?

How about this analogy from a layman's perspective. For Zen 3, AMD didn't add more lanes to the roadway, or increase the speed limit so that cars could travel faster. Instead, they improved the surface quality of the road, and got rid of all the debris and other hazards that was slowing down traffic!

 

[Carfax83]

Forget where I saw it, but the chiplets do have 6% more transistors and is about that much bigger.

If that's true, they got one helluva return on investment!

 

[Dave3000]

Anyone here with a 5800x test the memory write bandwidth out in AIDA64? Does the 5800x get full memory write bandwidth or is the memory write bandwidth half the speed of the memory read bandwidth?