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Det0x

Golden Member
Sep 11, 2014
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scineram

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DrMrLordX

Lifer
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Warhol seems to fit thet role, though it's still somewhat unclear what it entails. On top of the new I/O die I also would have thought they'd want to use a 6nm versions of Zen 3 Compute die on at least some higher-end SKUs. (as the masks are compatible it should be a minimal effort) but it looks like it's not the case. Perhaps 6nm isn't ready by that time or is too expensive.

N6 is unlikely. It isn't any more performant than N7, it's less performant tnan N7+ and N7P, and there's no way for us to know how much better AMD's custom N7 variant is than any of those three. But N6 would probably be a step backwards.

These are completely delusional. Zen 3 is N7 design. Also cost, capacity...
Could be N6 though, which is design compatible, but I wouldn't bet on it.

See above, N6 would likely bring about clockspeed regressions and other ugly side-effects. There's no guarantee that there will be a Zen3+ ever. But eventually they're going to have to move to 5nm.
 
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Gideon

Golden Member
Nov 27, 2007
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N6 is unlikely. It isn't any more performant than N7, it's less performant tnan N7+ and N7P, and there's no way for us to know how much better AMD's custom N7 variant is than any of those three. But N6 would probably be a step backwards.
Hmm, yeah it seems that TSMC indeed hasn't made any performance claims about N6.

But According to wikichip:
Last year, TSMC announced the N6 node. This is an EUV-based node, but unlike N7+ which is entering its 2nd year of production, N6 is designed to be the easy migration path from N7 as its design rules are fully compatible with N7. In fact, TSMC considers N6 to be part of the “N7 family”. N6 is said to provide around 15-20% higher density with improved power consumption compared to N7, albeit no iso-power or speed comparisons where provided. We believe the density gains are obtained from switching from double diffusion breaks to a single isolation line. TSMC did note that N6 has 1 more EUV layer compared to N7+.
At the very least, the lower power-consumption will help clock the chips higher (all-core turbo, not single-core). I also find it hard to believe that trading that 15-20% higher density for performance (e.g. keeping the die-size) would result in zero performance gain.

Why I thought they'd consider N6 is that at least according to TSMC themselves, it's meant to be a high-volume node where most clients (not yet going for 5nm) will end up. TSMC: "Most 7nm Clients Will Transition to 6nm"

In comments made during the quarterly call, CC Wei, TSMC's CEO and vice chairman noted that “most of the customers in the N7 will move to N6.” In fact it sounds like TSMC's N6 node is set to become another one of TSMC's popular, high volume nodes, with Wei further stating that “from that day on probably, the N6 will pick up all the momentum and pick up all the volume production.”


About the Custom AMD 7nm. What did you mean by that?

If you mean the Zen 3 node, it's the same that the "XT" models used, according to AMD. And that in turn is just an updated BKM or PDK (so nothing custom about that):
This is likely due to a minor BKM or PDK update that allows TSMC/AMD to tune the process for a better voltage/frequency curve and bin a single CPU slightly higher.
 

Asterox

Golden Member
May 15, 2012
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Nice OC on this 5600X.

It is not overclocked, 4.3ghz is just All Core Boost clock in CR15.

R5 5600X all core Turbo is 4.2ghz, and 4.6ghz is Singlecore boost. Hm, that is 100mhz over AMD specification.


 

DrMrLordX

Lifer
Apr 27, 2000
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At the very least, the lower power-consumption will help clock the chips higher (all-core turbo, not single-core). I also find it hard to believe that trading that 15-20% higher density for performance (e.g. keeping the die-size) would result in zero performance gain.

Increasing density can sometimes have adverse side-effects on clockspeeds. Though usually that's from high-density libraries.

About the Custom AMD 7nm. What did you mean by that?

Norrod made some vague remark about 7nm with "secret sauce". In other words, not N7, N7+, or even N7P. Unless I'm interpreting that incorrectly. But AMD hasn't been terribly clear on the subject.
 
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PhonakV30

Senior member
Oct 26, 2009
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hmm , Impressive.

 

HurleyBird

Platinum Member
Apr 22, 2003
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Robert Hallock drew the Zen 2 CCD completely wrong in that video, and I don't trust the Zen 3 layout either as it doesn't look like the one slide we saw. It's something he should know like the back of his hand. This one mistake is grievous enough to give me the opinion he should probably be replaced.
 
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Hitman928

Diamond Member
Apr 15, 2012
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Robert Hallock drew the Zen 2 CCD completely wrong in that video, and I don't trust the Zen 3 layout either as it doesn't look like the one slide we saw. It's something he should know like the back of his hand. This one mistake is grievous enough to give me the opinion he should probably be replaced.

It's just for demonstrative purposes only, it's not meant to be a block diagram. Trying to give an accurate representation of both while still differentiating the 2 architectures would probably just confuse the intended audience.
 

HurleyBird

Platinum Member
Apr 22, 2003
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Trying to give an accurate representation of both while still differentiating the 2 architectures would probably just confuse the intended audience.

Is the intended audience children with Down's syndrome?

Anyone watching that video is at least a somewhat curious. It's either an inexplicable screw up, or a total misunderstanding and underappreciation of the audience.

It's in AMD's interest to build curiosity and interest about tech. A more informed populace buys more AMD products in general.




Inappropriate comment about disabled people in a tech thread.



esquared
Anandtech Forum Director
 
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Hitman928

Diamond Member
Apr 15, 2012
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Is the intended audience children with Down's syndrome?

Anyone watching that video is at least a somewhat curious. It's either an inexplicable screw up, or a total misunderstanding and underappreciation of the audience.

It's in AMD's interest to build curiosity and interest about tech. A more informed populace buys more AMD products in general.

For some reason that quote didn't get applied to my post, but I think the target audience is gamers who don't have any idea about how the hardware actually works. Again, if you actually follow this stuff and are well informed, you've known about the change to an 8 core CCX for months already. If you are a gamer and just want the fastest hardware, this is a video trying to explain in very basic terms why Zen3 is better for gaming than Zen2 was. If you start drawing both CCX with cores each with L2 and then L3 in the middle but then Zen2 middle is actually different than Zen3 middle and even though it looks like Zen2 the L3 is all shared, it's actually not, but in Zen3 it looks like it's all shared and it is, it could get confusing for someone with limited (or even 0) technical knowledge.

Obviously you don't like the approach but to me it makes sense when your intended audience has almost no technical knowledge to create visual representations to try and demonstrate the differences clearly, even if it's not an actual accurate representation.
 

Thunder 57

Platinum Member
Aug 19, 2007
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Is the intended audience children with Down's syndrome?

Anyone watching that video is at least a somewhat curious. It's either an inexplicable screw up, or a total misunderstanding and underappreciation of the audience.

It's in AMD's interest to build curiosity and interest about tech. A more informed populace buys more AMD products in general.

Really? AMD's marketing has been crap for too long. Whether it be that stupid video with XFR or the 5GHz one or this. That's the one area that Lisa Su & Co have not cleaned up yet. But I'd rather have excellent engineers and poor marketing than the other way around.

But what I found distasteful was you making a joke about the intended audience being disabled children or just dumbtard adults. I mean, would your opinion change if you reproduced and had a child with Down Syndrome?

EDIT

FWIW, I did not report you.
 
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Panino Manino

Senior member
Jan 28, 2017
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Is the intended audience children with Down's syndrome?

Anyone watching that video is at least a somewhat curious. It's either an inexplicable screw up, or a total misunderstanding and underappreciation of the audience.

It's in AMD's interest to build curiosity and interest about tech. A more informed populace buys more AMD products in general.

You quoted the wrong person but anyway... it's complicated.
I was going to say that my only problem is that he started by saying "a bit more information", which is completely false because there's no new information there. But after paying more attention, he first says at 1:47 that what he will draw is not how "the chip is layout in real life", but then at 2:15 he contradicts this saying "all eight cores are in one single large block". We know that this isn't true, right? This is not what the die shot shows.

Maybe we could argue that makes no difference if it's really true that now all the cores can communicate with each other at the same speed. However, if Anandtech's review shows big differences in the inter-core latency, ooooh boy, we'll have another situation.
 
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exquisitechar

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.vodka

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Dec 5, 2014
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~1.25v is actually a safe voltage for TSMC's 7nm process for long term usage (Most Zen2/Zen2XT chips' FIT voltage is around there). ~4.65-4.7GHz for a manual safe overclock is awesome!

IIRC Zen3 also allows per core manual overclocking, so there's probably lots of performance left in these chips. 1usmus' CTR will shine with these chips.
 
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ElFenix

Elite Member
Super Moderator
Mar 20, 2000
102,422
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N6 is unlikely. It isn't any more performant than N7, it's less performant tnan N7+ and N7P, and there's no way for us to know how much better AMD's custom N7 variant is than any of those three. But N6 would probably be a step backwards.



See above, N6 would likely bring about clockspeed regressions and other ugly side-effects. There's no guarantee that there will be a Zen3+ ever. But eventually they're going to have to move to 5nm.
why did we invent a new word form when "it doesn't offer any more performance than N7, it's lower performing than N7+" would suffice?
 
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