DRAM Clock Mode
Use this field to configure the clock frequency of the installed DRAM. Settings:
[By SPD], [Manual].
Memclock Value (Mhz)
When it is set to [Manual] in ?DRAM Clock Mode?, user can place an artificial
memory clock limit on the system. Please note that memory is prevented from
running faster than this frequency. Setting options: [DDR200], [DDR266],
[DDR300], [DDR333], [DDR400].
The ratios are "hidden" within these values [DDRXXX]. I do not have this board so I can not give you a direct analogy
It could be DDR200=1:2, DDR266=2:3 etc...
Check Current DDR Clock to determine which divider (check PS2 below) is actually being used with each DDRXXX by using the formula:
CPU FSB * divider(x:y) = Current DDR Clock
Keep in mind that the frequency you see there is actually a bit higher than the real one used. To find the real one use Cpu-z or OCA64 (linkbelow) to know all the combinations before hand.
High Performance Mode
This field allows you to select the DDR timing setting. Setting to [Optimized] enables
Adjust DDR Memory Frequency automatically to be determined by SPD. Selecting
[Manual] allows users to configure these fields manually. Setting options: [Optimized],
[Manual].
This field could also play a role in your OC effort (enabling or disabling the memory divider), since I do not have this board try with both enabled and disabled
HT Frequency Select
This item allows you to select the Hyper Transfer frequency. Setting options:
[200Mhz], [400Mhz], [600Mhz], [800Mhz], [1000Mhz].
200= 1x HT multiplier
400= 2x HT multiplier
600= 3x HT multiplier
800= 4x HT multiplier
1000= 5x HT multiplier
So you must choose a value that will keep your HT frequency below 1000Mhz
Example:
CPU FSB=270Mhz (Current CPU clock in your BIOS)
Then you must use [600Mhz] because 3x270=810Mhz and 4x270=1080Mhz above the 1000Mhz spec...
Dynamic Overclocking:
Disabled
PS1 I could really use your info to update OCA64 to include your VIA motherboard BIOS settings and their OC results, so please reply with the dividers corresponding to each DDRXXX.
PS2 All the valid dividers are supposed to be: 12:12, 11:12, 10:12, 9:12, 8:12, 7:12, 6:12
which include the well known 12:12=1:1, 10:12=5:6, 8:12=2:3, 6:12=1:2