Pentium 4/Northwood and DDR SDRAM

[NFS4]

Some people on these forums are of the opinion that DDR SDRAM is not enough for the Pentium 4. We know that PC133 SDRAM is not enough. But Tom Pabst seems to think that DDR SDRAM has what it takes to at least match up to RDRAM on the Pentium 4. VIA claims that their DDR chipset is matching or exceeding RDRAM scores.

Dual channel DDR SDRAM (similar to the nForce's layout) would give the P4 4.2GB of bandwidth to play with, or 1GB more than RDRAM and it would give it lower latencies as well. And add to the way cheap prices of DDR SDRAM now, and hopefully lower prices with 478 Pentium 4's, this could be a nice platform.

 

[RaynorWolfcastle]

What you're saying is theoretically correct but remember that the numbers you are quoting are exactly that, theoretical maximums. I've read (but I don't remember the source so it cannot be considered 100% accurate) that RDRAM stays closer to its theoretically closer to its max bandwidth than DDR SDRAM. How is this, I don't know but it might mean that bandwidth wise, a dual channel DDR board is roughly equivalent to a dual channel RDRAM board. The latency issue remains however and DDR would probably have an edge.

The other thing to note is that a dual channel RDRAM board is easier to produce due to the nature of the chips.

-Ice

 

[NFS4]

<< What you're saying is theoretically correct but remember that the numbers you are quoting are exactly that, theoretical maximums. I've read (but I don't remember the source so it cannot be considered 100% accurate) that RDRAM stays closer to its theoretically closer to its max bandwidth than DDR SDRAM. How is this, I don't know but it might mean that bandwidth wise, a dual channel DDR board is roughly equivalent to a dual channel RDRAM board. The latency issue remains however and DDR would probably have an edge.

The other thing to note is that a dual channel RDRAM board is easier to produce due to the nature of the chips.

-Ice >>


There has got to be some kind of test to see what percentage of bandwidth each memory type is able to use. I read somewhere yesterday that RDRAM uses close to 50% of its available bandwidth at any given time. Maybe Wingnut PEZ has some answers?

As for costs/labor involved in building a dual-channel DDR board...I don't think it's gonna be THAT high. The nForce is supposed to retail for $100 - $125. Doesn't sound that bad to me.

 

[Sohcan]

I think the often-quoted numbers are 65% efficiency for DDR SDRAM, 80% for RDRAM, and 85% for SDR SDRAM. This probably changes with implementation...I would think that a dual-memory controller implementation like nForce might be more efficient at utilizing bandwidth.

 

[Noriaki]

I've done this calculation before...but I'll do it again here for fun.

Dual Channel PC2100 = 4.2GB/s

From what I understand DDRSDRAM is approx 65% bandwidth effecient.

4.2 * .65 = 2.73GB/s usable.

Dual Channel PC800 = 3.2GB/s

From what I understand Rambus is approx 85% bandwidth effecient.

3.2 * .85 = 2.72GB/s usable.

As you can see the final results for usable bandwidth are very very close.

Dual Channel DDR should be quite effective with the Pentium4.

The problem comes in with motherboard cost.
RDRAM only has a 16bit data path, 32bit for dual channel.
DDR has a 64bit data path, or 128bit for dual channel.

Now the total pin count for RDRAM and DDR is close, but more of those are power/ground for RDRAM I believe.
Now adding more pins requires more layers on your mobo PCB.
But I don't know if you can double up power and ground pins to save layers or not.
You definately can't double up data pins to save layers. Does anyone know if you can double up power and ground pins?

Even if you can you still can have a bit of an organizational problem. Because RDRAM is serial your data bus goes from the north bridge to the end of one slot, then out the other end of that RIMM to the next one.
DDR SDRAM the data pins have to go from the north bridge to the side of one DIMM then in parallel to the next.
So you can sort of organize your RIMMs so that they use different parts of the same layers. Where as the two dimms for the same channel have to be side by side, as the i850 Pro2 from MSi shows us the two rimms for the same channel can be in some odd positions so long as one end is nearby.

Now I'm not trying to throw out any facts here, I don't know if motherboard design costs will be a major factor, I'm just saying that there are some mobo design issues with Dual Channel DDR that aren't as problematic for Dual Channel Rambus. I don't know if this will factor into the end cost though.

But from a performance standpoint, Dual Channel DDR should certainly be effective on the P4.

I hope we could get a Crush for the P4..that would kick arse.

 

[Athlon4all]

Here's my take on it, I have long sense said that Dual Channel DDR is the solution for the P4, having 4.2GBps, but the issue has always been the cost of the motherboard changes for Dual DDR because, yes RDRAM is easier to implement in Dual Channel because of the 16-bit bus Vs. 64-bit for DDR. I really am not sure what to think as far as Single Channel DDR for Northwood aka VIA's P4X266 and Intel's 845. I have doubted how effective it would be, but still it could be (watch VIA Hardware.com, they keep on saying that they're gonna have benchy's soon to see if VIA's claims about P4X266 beat 850). A Crush for P4 would be great, but unlikely since no love is lost between Intel and Nvidia now so. We will just have to wait and see.

 

[SPAnDAU]

I'm not too sure of the technical details here so please correct me if I'm wrong, but does the way RDRAM work increase the likelyhood of higher defect rates?

What I mean is this, RDRAM accesses one memory module on a stick at a time. That module gets quite warm, hence the heat spreader to spread the heat to the other chips. Now wouldn't the rapid increase and then decrease in temperature put a lot of strain on the RDRAM chips, or has this been taken into account in the design process?


Basically what I'm wondering is could this be a factor to consider if you were deciding between a system with DDR or RDRAM?

 

[Marty]

Well, since Intel is forbidding motherboard manufacturers from producing DDRSDRAM motherboards with the i485, I think its safe to assume that the performance delata is small enough to take at least some credibility from DRDRAM. Couple this with the fact that VIA is claiming equal or in some cases superior performance, and the Intel hype machine becomes less believable. If I remember correctly, HardOCP had a bit a while back talking about Intel's response to VIA's claims (Intel called them bogus), where the HardOCP representative mentioned that he had seen the benchmarks and could verify their claims.

Marty

 

[NFS4]

<< Now I'm not trying to throw out any facts here, I don't know if motherboard design costs will be a major factor, I'm just saying that there are some mobo design issues with Dual Channel DDR that aren't as problematic for Dual Channel Rambus. I don't know if this will factor into the end cost though. >>


What about the nForce?

 

[Noriaki]

What about it?

Do we know how much boards based on nForce 420 will cost yet?

I heard that the single channel boards were like 100-125....do we have pricing on the dual channel boards yet?

 

[Degenerate]

The only reason (i think) that there are no DDR SDRAM for the P4 is the issue between Rambus and intel (in legal matters). Only until next year can we see the real performance; unless VIA goes for launch.

 

[NFS4]

<< What about it?

Do we know how much boards based on nForce 420 will cost yet?

I heard that the single channel boards were like 100-125....do we have pricing on the dual channel boards yet? >>


http://www.theregister.co.uk/content/archive/19772.html

There is a $10 difference between the nForce 220 chip and the nForce 420. That's where The Register got its $100 - $125 figure for nForce boards.

As to &quot;What about it?&quot; I'm saying that dual-channel DDR can't be that hard to implement if the boards are going to be retailing for under $150.

 

[Noriaki]

Sorry that wasn't meant to sound snotty.

Yeah the chip itself is only going to cost $10 more.

But how much more will the board cost? Likely you will have to have more than 4 players on the PCB to get dual channel DDR on there.

I wasn't meaning added cost from the chipset, but just from the board itself.

Edit: Hmmmm maybe that $125 price is for nForce 420...I didn't see the $100-125 last time I read it.

I wonder if mobo manufacturers can make 6 layer PCBs that cheap though....I guess the Epox AMD760 can be had for as low as $130...and I think that's a 6 layer board as well...and AMD760 is a more expensive chipset.

Hmmm...perhaps dual channel DDR won't be as expensive as I thought.

That would be good....if Intel lets them make it for P4.

 

[NFS4]

<< Sorry that wasn't meant to sound snotty.

Yeah the chip itself is only going to cost $10 more.

But how much more will the board cost? Likely you will have to have more than 4 players on the PCB to get dual channel DDR on there.

I wasn't meaning added cost from the chipset, but just from the board itself. >>


According to Anand's nForce article, the reference 420 board is 4-layers and manufacturers are likely to stick with that.


<< That reference design has 4 layers, which is exactly what motherboard manufacturers like to see since it keeps manufacturing costs down. Similarly, our sources tell us that NVIDIA is using a 0.15 micron 7-layer metal process to manufacture the nForce, which should help keep the cost and heat production down. >>


http://www.anandtech.com/chipsets/showdoc.html?i=1484&amp;p=9

 

[Noriaki]

Aren't those nForce 220 boards though?

I assumed that since they have 3 DIMMs they probably aren't Dual Channel...

 

[jaydee]

I would be surprised if they could get dual-channels on a 4-layer PCB, its just not logical. Then again I thought it would be illogical to produce an intergrated audio/video chip, and nVidia blew that theory out of the water, so I could very well be wrong. My reasoning though is that if it were possible with the AMD760, or any of the Via's then they would have done it. But then, AMD isn't a 'chipset maker', and Via sometimes doesn't have it all together so to speak, so I dunno.

 

[NFS4]

<< Aren't those nForce 220 boards though?

I assumed that since they have 3 DIMMs they probably aren't Dual Channel... >>


Those are all 420 boards The two paired slots are one DDR channel. The single slot is another DDR channel.

http://www.anandtech.com/chipsets/showdoc.html?i=1484&amp;p=4


<< Interestingly enough, the IGP-128 supports 3 DIMM slots - an odd specification when there are two memory controllers. It turns out that the first slot is linked to the first memory controller and the other two slots are linked to the second memory controller. You'd think that the IGP would be able to support 4 DIMM slots with 2 in each bank, but obviously there was some sort of design issue that prevented them from doing this. We wouldn't be too surprised if some manufacturers come up with boards supporting 4 DIMMs. Once again, the memory controllers are completely independent of each other, so you can have unequal amounts of memory in each bank. >>

 

[RedBeard0531]

<< Aren't those nForce 220 boards though?

I assumed that since they have 3 DIMMs they probably aren't Dual Channel... >>



No, they said that tere are sheveral timing issues to work out before they can put four DIMMs in, so they decided to setle for 3.

Also, correct me if I am wrong, but I think I read something that said that sdram is good at short transfers, while rdram is good with streaming data while the buss is being fully utilized.

Another thing to consider is that the pIV was built around rdram. Remember how little the gains on a p3 /w ddr were. Im guessing that Northwood(the new pIV) will be DDR optimised, just like the palmino.

 

[Noriaki]

Oh freaky...I thought you had to have even number of slots on the board.

Wow 4 layer nForce 420 boards!

Ok....I'm convinced.

Give us nForce for P4!

 

[NFS4]

<< Oh freaky...I thought you had to have even number of slots on the board.

Wow 4 layer nForce 420 boards!

Ok....I'm convinced.

Give us nForce for P4! >>


Phew, it took me long enough to convince you

 

[Noriaki]

Heheheh ok maybe I'm a little dense

 

[ST4RCUTTER]

How does the P4's tiny L1 cache play into the effect or DDR utilization? I mean, the P4 has an 8KB L1 cache compared to the 16 KB P3, and 64KB Athlon cache. My understanding is that this small cache is better suited to the 16-bit serial nature of RDRAM and that a 64-bit DDR solution would cause latency penalties due to the P4 architecture. Will larger blocks of data from the system memory increase branch misprodictions or is size irrelevant?

Does the P4's 256-bit L2 overcome this small L1 cache problem? The bandwidth of the P4's L2 cache is a whopping 48GB/s compared to the anemic 6GB/s Athlon. Clearly, AMD needs to address the bandwidth issues of the Athlon core with the Thouroughbred...just my opinion though.

Your thoughts?

 

[RedBeard0531]

Actauly the athlon has a 128kB L1. While this is OT the big differance is that the Athlon's FPU works out of the L1 (/w a 3-4 clk Latency), while the p4 works out of the L2(10-20 clk latency). For more info read this.

Edit: Typo

 

[ST4RCUTTER]

Actauly the athlon has a 128kB L1--RedBeard0531


Right you are. One 64KB instruction associative cache and one 64KB associative data cache totalling 128KB on-die L1 cache.

 

[Noriaki]

Intel's L1 I-Cache is smaller, but it's organized differently that makes it more efficient. As for memory bus size it's not terribly relevant to L1 cache size because L2 sits between memory and L1 on the P4.

The reason the P4 can get away with a small is because of the huge bandwidth L2. And as long as you have large bandwidth to feed the L2 you're fine.

The RAM fills up the L2 and then L1 gets it data from L2.
The L1 organization should have very little impact on RAM.

And anyways, Dual Channel Rambus may be 32bit 400Mhz DDR, but the north bridge has to convert that to 64bit 100Mhz QDR for the P4.
There's no reason a well designed North Bridge couldn't translate 128bit 100 (133?)Mhz DDR to 64bit 100Mhz QDR just as effectively.

The P4 doesn't get data in 16bit chunks, it gets it in 64bit chunks. It's up to the north bridge to translate between that and RAM.