Post what you copied last =)

Page 5 - Seeking answers? Join the AnandTech community: where nearly half-a-million members share solutions and discuss the latest tech.

sharkeeper

Lifer
Jan 13, 2001
10,886
2
0
DEFINE_MODULE: Usart_a70

DEFINE_DEVICE_INSTANCES:
END_DEFINE_DEVICE_INSTANCES.

DEFINE_TOPOLOGY:
END_DEFINE_TOPOLOGY.


END_DEFINE_MODULE.



DEFINE_MODULE: top_level

DEFINE_DEVICE_INSTANCES:
u01 = usart rise_time:=7ns | 3.200000 3.500000 4.100000 4.100000
u02 = cpu | 4.800000 6.600000 6.600000 7.200000
new2 = ram_module timing:=34sec | 6.900000 4.800000 8.700000 5.400000
u2 = usart rise_time:=ns | 2.200000 6.300000 3.100000 6.900001
u3 = usart rise_time:=7ns | 2.000000 3.900000 2.900000 4.500000
u4 = usart rise_time:=ns | 2.000000 5.000000 2.900000 5.600000
END_DEFINE_DEVICE_INSTANCES.

DEFINE_TOPOLOGY:
u01 out new2 in simplex 0 Integer L0 7.000000 4.800000 7.000000 4.000000 4.100000 4.000000
u02 NC new2 io full-duplex 0 Integer L1a L1b 8.000000 5.400000 8.000000 6.000000 6.400000 6.000000 6.400000 6.600000
new2 out u01 in simplex 0 Real L2 4.100000 3.600000 8.200000 3.600000 8.200000 4.800000
u01 bs new2 prt half-duplex 0 Std_logic BL5 6.900000 4.900000 3.600000 4.900000 3.600000 4.100000
u02 mstr new2 prt half-duplex 0 Std_logic BL5 6.900000 5.400000 5.000000 5.400000 5.000000 6.600000
u3 io1 u4 bs half-duplex 0 Std_logic BL5 2.400000 5.000000 2.400000 4.500000
u2 io1 u4 bs half-duplex 0 Std_logic BL5 2.300000 5.600000 2.300000 6.300000
u3 io1 u01 bs half-duplex 0 Std_logic BL5 3.500000 3.500000 3.500000 3.200000 2.400000 3.200000 2.400000 3.900000
END_DEFINE_TOPOLOGY.

GENERIC: bufsize : integer := 8192

END_DEFINE_MODULE.



DEFINE_MODULE: ram_module

PORT_LIST( prt, out, io, in );

DEFINE_DEVICE_INSTANCES:
Mem1 = mem_core | 3.300000 3.400000 5.100000 4.000000
END_DEFINE_DEVICE_INSTANCES.

DEFINE_TOPOLOGY:
ram_module in Mem1 final_input simplex 0 Integer L0 3.600000 3.400000 3.600000 2.100000 1.900000 1.500000
Mem1 final_io ram_module io full-duplex 0 Integer L1a L1b 3.200000 6.400000 3.600000 5.000000 3.600000 4.000000
Mem1 final_out ram_module out simplex 0 Real L2 4.900000 1.700000 4.900100 3.400000
ram_module prt Mem1 dest half-duplex 0 Std_logic L3 3.300000 3.500000 0.900000 3.500000
END_DEFINE_TOPOLOGY.

GENERIC: timing : time := 65.037562

END_DEFINE_MODULE.






DEFINE_DEVICE_TYPE: sharc
PORT_LIST( a1, b2 );
END_DEFINE_DEVICE_TYPE.
 

Electrode

Diamond Member
May 4, 2001
6,063
2
81
Loaded prism54 driver, version 1.0.2.2
eth0: resetting device...
eth0: uploading firmware...
eth0: firmware upload & reset successful!

Excerpt from my laptop's dmesg, pasted into an ICQ message while helping someone get an 802.11g card working...
 
sale-70-410-exam    | Exam-200-125-pdf    | we-sale-70-410-exam    | hot-sale-70-410-exam    | Latest-exam-700-603-Dumps    | Dumps-98-363-exams-date    | Certs-200-125-date    | Dumps-300-075-exams-date    | hot-sale-book-C8010-726-book    | Hot-Sale-200-310-Exam    | Exam-Description-200-310-dumps?    | hot-sale-book-200-125-book    | Latest-Updated-300-209-Exam    | Dumps-210-260-exams-date    | Download-200-125-Exam-PDF    | Exam-Description-300-101-dumps    | Certs-300-101-date    | Hot-Sale-300-075-Exam    | Latest-exam-200-125-Dumps    | Exam-Description-200-125-dumps    | Latest-Updated-300-075-Exam    | hot-sale-book-210-260-book    | Dumps-200-901-exams-date    | Certs-200-901-date    | Latest-exam-1Z0-062-Dumps    | Hot-Sale-1Z0-062-Exam    | Certs-CSSLP-date    | 100%-Pass-70-383-Exams    | Latest-JN0-360-real-exam-questions    | 100%-Pass-4A0-100-Real-Exam-Questions    | Dumps-300-135-exams-date    | Passed-200-105-Tech-Exams    | Latest-Updated-200-310-Exam    | Download-300-070-Exam-PDF    | Hot-Sale-JN0-360-Exam    | 100%-Pass-JN0-360-Exams    | 100%-Pass-JN0-360-Real-Exam-Questions    | Dumps-JN0-360-exams-date    | Exam-Description-1Z0-876-dumps    | Latest-exam-1Z0-876-Dumps    | Dumps-HPE0-Y53-exams-date    | 2017-Latest-HPE0-Y53-Exam    | 100%-Pass-HPE0-Y53-Real-Exam-Questions    | Pass-4A0-100-Exam    | Latest-4A0-100-Questions    | Dumps-98-365-exams-date    | 2017-Latest-98-365-Exam    | 100%-Pass-VCS-254-Exams    | 2017-Latest-VCS-273-Exam    | Dumps-200-355-exams-date    | 2017-Latest-300-320-Exam    | Pass-300-101-Exam    | 100%-Pass-300-115-Exams    |
http://www.portvapes.co.uk/    | http://www.portvapes.co.uk/    |