Discussion Qualcomm Snapdragon Thread

[adroc_thurston]

The power consumption of the Oryon cores is too high for a fanless laptop

Did anyone really ever expect 10W SDP from a part with 12 big cores?

 

[gdansk]

Did anyone really ever expect 10W SDP from a part with 12 big cores?

Yes! I thought ARM was supposed to be just that good.
But now I'm waiting for LNL, it seems it has a better chance.

 

[SarahKerrigan]

Yes! I thought ARM was supposed to be just that good.
But now I'm waiting for LNL, it seems it has a better chance.

ARM had no involvement in making these cores.

 

[gdansk]

ARM had no involvement in making these cores.

Sorry I mean ARMv8+ ISA

 

[adroc_thurston]

ARM had no involvement in making these cores.

They did, they're ARMv8, after all!

 

[SarahKerrigan]

They did, they're ARMv8, after all!

Well, they published the manual and the validation suite, I guess.

Sorry I mean ARMv8+ ISA

A baffled "I thought x86 was supposed to be just that good!" would sound weird responding to Dozer's foibles. It sounds equally weird here.

 

[igor_kavinski]

They did, they're ARMv8, after all!

I think she meant direct involvement, as in providing support, since they have a legal dispute going on.

 

[gdansk]

A baffled "I thought x86 was supposed to be just that good!" would sound weird responding to Dozer's foibles. It sounds equally weird here.

No one claims x86 is good, however. Some bravely suggest that its flaws are not debilitating.
But people really do claim ARM is a wunder-ISA (at least compared to x64 and even RISCV). I could go find some ARM employee from Texas who tweets too much while denigrating RISCV if proof is needed.
Nuvia suggested they were to bring M1-like efficiency to the server world. They pivoted to laptops with the Qualcomm acquisition but I still believed it.

 

[SarahKerrigan]

No one claims x86 is good, however. Some bravely suggest that its flaws are not debilitating.
But people really do claim ARM is a wunder-ISA (at least compared to x64 and even RISCV). I could go find some ARM employee from Texas who tweets too much while denigrating RISCV if proof is needed.
Nuvia suggested they were to bring M1-like efficiency to the server world. They pivoted to laptops with the Qualcomm acquisition but I still believed it.

RV is a potato. Compared to that, ARM64 is a wunder-ISA. (Compared to PPC, ARM64 still looks pretty good but decidedly less miraculous.)

Anyway, it's possible to flub an implementation on any ISA, especially when you're bringing together multiple design groups with very different internal cultures, flows, and habits. There is a long history of crappy ARM64 cores to look at as examples - ThunderX, X-Gene and its successors, etc.

 

[gdansk]

RV is a potato. Compared to that, ARM64 is a wunder-ISA. (Compared to PPC, ARM64 still looks pretty good but decidedly less miraculous.)

Anyway, it's possible to flub an implementation on any ISA, especially when you're bringing together multiple design groups with very different internal cultures, flows, and habits. There is a long history of crappy ARM64 cores to look at as examples - ThunderX, X-Gene and its successors, etc.

Are you saying it's a flubbed implementation? I didn't say that. The performance is fine but it doesn't sip power like many expected for an ARM implementation from a mobile-first company like Qualcomm.

And I quite like MIPS and RISCV but despise SPARC and PowerPC so I guess we have opposite taste in RISCs.

 

[igor_kavinski]

And I quite like MIPS and RISCV

You have to tell us why you like them and what ARM64 lacks

 

[SarahKerrigan]

And I quite like MIPS and RISCV

Statistically, someone has to.

 

[gdansk]

You have to tell us why you like them and what ARM64 lacks

ARM64 doesn't lack anything and that's my problem. It's about as RISC as a hypothetical register-register VAX.

 

[igor_kavinski]

It's about as RISC as a hypothetical register-register VAX.

Ah. So you think it packs too many instructions in its ISA.

A comparison would be nice if you could show how big the ISAs for ARM64, MIPS and RISC-V are.

 

[SarahKerrigan]

Awfully curious why "number of ops" is the metric of goodness.

RV's deficiencies are evident for anyone building real silicon to run real software, as opposed to academic toys. There's a reason serious RV vendors seem to inevitably add large, mutually-incompatible, extensions of their own - often for functionality ARM64 provides out of the box.

 

[FlameTail]

Measuring the standby power of Snapdragon X Elite laptop and comparing it to Windows laptops:

Spoiler

He did a 12 hour standby test.

Intel laptop consumes about 1W per hour of standby.
Total standby time for the whole battery then works out to about 50 hours (~50Wh battery).

The Snapdragon laptop has a ~70 Wh battery, and get this- it consumed 0.7Wh for 12 hours of standby.

That works out to 1200 hours of standby.

THIS IS UNBELIEVABLY CRAZY. TRULY SENSATIONAL.

 

[gdansk]

Awfully curious why "number of ops" is the metric of goodness.

RV's deficiencies are evident for anyone building real silicon to run real software. There's a reason serious RV vendors seem to inevitably add large, mutually-incompatible, extensions of their own - often for functionality ARM64 provides out of the box.

It's not on topic here but I wonder why you feel the need to defend ARM here. ARM Ltd is suing their largest customer. ARM Ltd makes hate pages about RISCV and sends legal threats to the Internet Archive to expunge it from their history after realizing it did more harm than good:

All I said was I still cannot buy a fanless ARM PC laptop with M1 efficiency. And I was apparently wrong to expect it.

Ah. So you think it packs too many instructions in its ISA.

A comparison would be nice if you could show how big the ISAs for ARM64, MIPS and RISC-V are.

You can google this as well as I can. The number of addressing modes and instructions.

 

[SarahKerrigan]

It's not on topic here but I wonder why you feel the need to defend ARM here. ARM Ltd is suing their largest customer. ARM Ltd makes hate pages about RISCV and sends legal threats to the Internet Archive to expunge it from their history:

I have my own problems with ARM as a company. That doesn't excuse a lot of the brain-dead design decisions behind RV.

RV absolutely reeks of "thing an academic thought sounded like a great idea" rather than "thing that was designed to run real software."

As for MIPS - funny thing about that is that MIPS Inc, toward the end, knew full well that the MIPS ISA had serious problems. Hence R6, and hence nanoMIPS - which was probably the best embedded ISA ever.

 

[FlameTail]

Can you guys stop arguing about ARM vs RISC-V, and talk about the amazing standby performance of Snapdragon X Elite?

 

[gdansk]

Can you guys stop arguing about ARM vs RISC-V, and talk about the amazing standby performance of Snapdragon X Elite?

Sure. I don't have any delusions that we'll be getting RISCV laptops soon.
But where are the fanless ARM laptops? Only seems to be Apple...

 

[igor_kavinski]

You can google this as well as I can. The number of addressing modes and instructions.

I was hoping you would give us some numbers off the top of your head. But Sarah is making a good point. Having a truly "RISC" ISA is too limiting for real world silicon that needs to run real software.

Anyway, how do you think MIPS or RISC-V would do a better job than ARM64 at making a fanless laptop possible (in a world where Apple Mx silicon doesn't exist)?

 

[SarahKerrigan]

I was hoping you would give us some numbers off the top of your head. But Sarah is making a good point. Having a truly "RISC" ISA is too limiting for real world silicon that needs to run real software.

RISC doesn't mean anything anyway. Historically it means exactly two things: fixed-length and load-store. Beyond that it just turns into "I dunno, whatever people think was cool in the 80s, man." RV holding to this weird idea of 80s orthodoxy rules out a lot of useful functionality - ie, paired load/store, indexed addressing modes, pre/post-increment addressing, embedded SIMD, carry, etc, etc, etc. A certain amount of this is a product of an insistence on rigid 1W2R access.

This is silly, and means that RV taken as a whole is just... kind of bad. I've not talked to anyone in semiconductor outside of Sifive that really likes it - there's a lot of "well, it seems like it's happening regardless, and we don't need to maintain our own compiler and OS ports anymore, so whatever" but nobody seems to think it's an especially good ISA.

 

[POWER4]

I've spent the last five days with two X Elite laptops, both lent. Here are my impressions so far.

1) Surface Laptop 7 (13")

This computer is seriously impressive. I can barely remember the last time I was this impressed with a laptop other than the M1 MacBook Air (ThinkPad T440 maybe?). I got it after it had already gone through all the update/configure process, so software-wise it was a good experience from the get-go.

Talking X Elite here, the chip is good. It felt very snappy at all times.
Honestly, I can barely say I've heard the fans. The battery lasted almost 14 hours in my typical usage. (Disclaimer: I usually use a lower brightness setting than most people).
For comparison, my Thinkpad T14 G5 lasts at most 7 hours in the same usage. It also gets very hot and can blast its fans out of nowhere.

2) ThinkPad T14s

This one, on the other hand, is very unimpressive. Lacking build quality. Bulky. The keyboard is not very nice, which is a shame for a ThinkPad.
I can't say the performance was terrible or I've managed to get it hot, but the battery was only slightly better than my T14s. For its asking price, I consider it a no-go.

In other words, it seems the part is good. Not earth-shaking, but good. You only need to do a bit of research before choosing the laptop.
I would go with the Surface Laptop any day. Can't imagine one being unsatisfied with it.

 

[gdansk]

Anyway, how do you think MIPS or RISC-V would do a better job than ARM64 at making a fanless laptop possible (in a world where Apple Mx silicon doesn't exist)?

I didn't say that at all, Igor. I said I expected an efficient and performant fanless laptop. But only one company has managed it so far and it's Apple. I don't think ARM is a wunder-ISA. That doesn't mean I think proper Stanford RISCs like RISC-V are any better for making a fanless laptop. In fact, that I'm waiting for LNL kinda shows I am not an ISA fetishist and no longer have any delusions about ISA having a big impact on the existence of fanless laptops

 

[Khato]

Can you guys stop arguing about ARM vs RISC-V, and talk about the amazing standby performance of Snapdragon X Elite?

You mean the amazing windows connected standby performance that's possible when Microsoft fixes their side of it? When in the 'idle' modern connected standby state x86 CPUs are already below 50mW consumption. The average only climbs to 1W because Windows doesn't let them stay in the idle state.

Sadly I wouldn't be surprised if Microsoft continues intentionally hamstringing x86 modern connected standby to give WoA a meaningful selling point.