I think Arm will win. It is just more efficient.
tell that to A17 P-core kekOr maybe optimizing for power first, IPC second-ish, and frequency last-ish just tends to get you to a better place than when you try to do it the other way around.
A17 P core is good after the iOS 17.0.3 update.tell that to A17 P-core kek
No, it has ughhhh let's say worse fundamentals than Everest.A17 P core is good after the iOS 17.0.3 update.
You're not really helping, here 🤔No, it has ughhhh let's say worse fundamentals than Everest.
If you make this analysis from geekerwan video it's not a good assumption to make.No, it has ughhhh let's say worse fundamentals than Everest.
So you can tell Intel how to design better CPUs?We need a technical breakdown of the core architecture next
No, if anything it might be easier given decode and load store should be easier.ELI5 - Is there something inherent to ARM designs that prevent it from clocking to 5ghz? I don’t think I’ve ever seen a modern ARM core running at clocks seen in Intel / AMD cores.
I agree.Most exciting CPU launch since the M1. Really looking forward to seeing the Nuvia core get benchmarked.
GB 6 "MT" is a complete joke, and comparisons like these show why. Using it you simply can't compare differently sized chips and infer their potential performance in multicore tasks. You only get a view on how performance is in a few specific tamely multithreaded tasks, disadvantaging chips that have more cores compared to chips that have fewer cores but at higher frequency (which is already covered by ST as well). So the second sentence in the quote is exactly the kind of conclusion one can't make with GB 6 "MT".I see the M2 Pro/Max are only about 50% faster than the M2 in Geekbench 6, which appears to be the tool Qualcomm use for their comparisons. Which makes their new chip about as fast as an M2 Pro/Max in multicore tasks
Yeah, it surely isn't scaling well at all past ~8 cores.GB 6 "MT" is a complete joke, and comparisons like these show why. Using it you simply can't compare differently sized chips and infer their potential performance in multicore tasks. You only get a view on how performance is in a few specific tamely multithreaded tasks, disadvantaging chips that have more cores compared to chips that have fewer cores but at higher frequency (which is already covered by ST as well). So the second sentence in the quote is exactly the kind of conclusion one can't make with GB 6 "MT".
| CPU | Cores | Geekbench 6 score (MT) |
|---|---|---|
| Intel Core i9-13900KS | 24 | 21744 |
| AMD EPYC 9554 | 64 | 20172 |
| Intel Xeon w9-3495X | 56 | 19738 |
| AMD Ryzen 9 7950X3D | 16 | 19704 |
| AMD EPYC 9654 | 96 | 19153 |
| AMD Ryzen Threadripper PRO 5995WX | 64 | 18205 |
| AMD Ryzen 9 7900X | 12 | 16840 |
| AMD Ryzen 7 7700X | 8 | 15163 |
| AMD Ryzen 5 7600X | 6 | 12664 |
| AMD EPYC 7742 | 64 | 11782 |
So the second sentence in the quote is exactly the kind of conclusion one can't make with GB 6 "MT".
Didn't they say that they achieve that >M2 1T GB result by overclocking just 2 cores?One thing I find bizarre is that the SDXE (Snadragon X Elite) is only 50% faster than the Apple M2 in multi-core. That would put it on par with M2 Max in multi-core performance, which has an 8P+4E CPU.
Yeah, it surely isn't scaling well at all past ~8 cores.
What's worse it vastly prefers higher frequency and more unified cache to more cores
It's not overclock, it's a boost algorithm, Based on the slides ALL the cores should be able to hit 3.8 Ghz if there is thermal headroom(and it would be really odd to test in thermally limited conditions, considerint M2 Max is also available in desktop verisons)Didn't they say that they achieve that >M2 1T GB result by overclocking just 2 cores?
Presumably that means that matching that perf for all 12C would raise the TDP ceiling significantly.
I suspect that those 3x 4C clusters are running at lower clocks when there is a highly threaded task being run.
Meh - to me it's all semantics about clocking cores beyond their ideal perf/watt window.It's not overclock, it's a boost algorithm
According to AT, each CPU core should have 3MB L2 cache total 36MB. Plus 6MB L3 cache; that's slightly less than M2's 8MB.Sounds like >99% of laptop, non HEDT desktop use case to me. The rest 1% are from AMD/Intel marketing, running ideally scaling benchmarks like CB23?
I think their MT score is held back by "SoC" level limitations, like too small L3 cache, IMC getting swamped by too many request. 4C cluster size is not helping either, pretty much means inter cluster core comms take a huge hit and impact performance.
Still, for 1st generation, 3250'ish is GREAT SC GB6 score to be at, MT scaling being not optimal is pretty much expected from a chip with TOTAL cache budget of 42MB ?
12MB of L2 (per complex) with only 6MB L3?According to AT, each CPU core should have 3MB L2 cache total 36MB. Plus 6MB L3 cache; that's slightly less than M2's 8MB.