You want to design a device that lives off one of these HS(high speed)IO ports or you want to create the interface module which device hooked to? For the latter, in the industry there is a lot of reuse and sharing of IP.
Either way I would say look into the mindshare books (
http://www.mindshare.com/shop/?section=132B067E) they have books covering all those subjects + more. Almost everyone at work has one or more (ranging in topics) sitting on their desks. Also there are the industry specs for all those buses too.
As for free stuff, i have yet find something on the web with detailed info on these topics.
But we could elaborate in this thread about the subject(s)
Lets see high level typically things are connected as such:
[core]<=>[north bridge]<=>[South Bridge/IO bridge]<=>[USB]/[PCIe]/[SATA]<=>[Devices]
[core]<=>[north bridge]<=>[MemController]<=>[RAM]
Depending on the System, each "<=>", can be a completely different bus with a different protocol. Software running on the core setups and enable the devices once it comes out of reset. Then talking between the device and the core are typically by reading/writing memory/IO space given to each device.
Is there something specific you want to know or just high level talk?