IllogicalGlory
Senior member
- Mar 8, 2013
- 934
- 346
- 136
Vega seems like a more Pascal/Maxwell-esque design with high clockspeeds along with a fancier architecture, taking up space where CUs might have gone in older AMD designs.
how many compute units would be in this though. 14 nm 500+mm^2. not likely 4096 right?
in useful cases, not just "I want 64 x tessellation and i will have it!"
I've already said AMD is on a segmented release cycle. Instead of releasing a full line up over 2 years like the competition. They are releasing a high end architecture then a low architecture and alternating. It's a new strategy. It will be interesting to see how it effects AMD and whether they do any better compared to the competition.So it looks like Navi must be another low end series like Polaris (takes up less die space) and then the true replacement of Vega will be after that.
People seen these yet?
The slides we are sharing today are the same slides we described to you back in September (so they are not new). We are posting this because so far everything turned out to be (almost) correct.
I've already said AMD is on a segmented release cycle. Instead of releasing a full line up over 2 years like the competition. They are releasing a high end architecture then a low architecture and alternating. It's a new strategy. It will be interesting to see how it effects AMD and whether they do any better compared to the competition.
We didn't see them months ago, they were described months ago.Aren't those the slides from months ago?
Yeah:
We didn't see them months ago, they were described months ago.
I've already said AMD is on a segmented release cycle. Instead of releasing a full line up over 2 years like the competition. They are releasing a high end architecture then a low architecture and alternating. It's a new strategy. It will be interesting to see how it effects AMD and whether they do any better compared to the competition.
Navi is scalable architecture. It means that it can scale from small to bigger GPUs without any problem, without much work to do with the silicon design. Raja touted however, that on smaller nodes we will see a shift to multiple smaller number of GPUs.ATI did something similar in the old days. When a new process was announced, first the "low" architecture would be made on the process. After gaining experience with the process, the"high" architecture is made on the new process. It makes sense to do so, smaller dies and in the low architecture, more resources can be spend to solve issues of the new process. Maybe they have turned back to a similar strategy.
Well, the Videocardz info that was right so far mentioned 64 CU's. And there was the Linkedin profile leak with graphics IP v9 and 4096 shaders.Are you sure It's 4096 ALUs? AMD didn't say anything about number of ALUs.
I have watched the PCWorld interview with Raja. One thing apparent about Vega is this: it is designed for the future. Tile-Based Rasterization will be immediately apparent as improvement. However, Primitive Shaders, and Geometry Pipeline are designed for the future. Doom for example has not been updated for this feature, and Vega does not benefit from it whatsoever.
I am not sure about this , but does dx12 and vulcan support additional features that where not the immediate standard ?
Like for example the primitive shaders ?
That is correct.Then it may be like the RX 480, where reference uses exactly the TDP and virtually every aftermarket uses extra pins.