Radeon Vega Architecture Preview Thread

[raghu78]

One thing came to my mind
http://cdn.videocardz.com/1/2017/01/AMD-VEGA-10-specifications-1000x546.jpg

If Vega for HPC has 64 CUs, and 12 TFlops compute power, it means its (boost) clock is around 1450 MHz. And we know previous HPC cards had 100-150 MHz lower clock compared to gaming GPUs. Which should mean that gaming Vega will have (boost) clock at 1500-1600 MHz?

On the other side, as discussed before, in ~530mm^2 chip, made in 14nm, you should be able to fit at least 80 CUs. I mean, P10 is 232mm^2 and has 36 CUs. As someone mentioned, it might be due to NCU changes. But 72 CUs chip (2xP10) should be within 400mm^2, probably less. This die is just too large in my opinion. When we compare Hawaii -> Fiji, increase in CUs is similar to increase in number of transistors and die. I suppose Fiji is more complicated due to HBM controller. And even die shrink of Fiji shouldn't be larger than 400mm^2.

Yes, Vega will have 8 shader engines while Fiji has 4, but again, 2xP10 (2x4 SEs) plus additional stuff (improvements) minus things you won't double (eg. Media blocks...) and 8 CUs, and it should still be at 450mm^2 ?

Also Tahiti -> Tonga, they have put 700 million transistors more in just a little bit larger chip (7mm^2). So does this changes really require ~30% more space? Or is there Vega with more than 64 CUs?

At this moment their design choice is to make chips with lot of slow(er) cores. Are they taking the new way now and plan to make GPUs with smaller amount of faster cores?

I believe AMD maintains a 1:1 ratio between shader engines and geometry engines. Vega is confirmed to have 4 geometry engines. So its most probably 4 shader engines and 4 geometry engines. With each engine powering 16CU (1024sp). AMD say they have improved load balancing and IPC . But we have to wait and see if there are still any bottlenecks or problems with getting the full performance out of the Vega GPU.

http://www.anandtech.com/Gallery/Album/5395#38

Vega is designed to handle upto 11 polygons per clock with 4 geometry engines.

 

[Glo.]

I believe AMD maintains a 1:1 ratio between shader engines and geometry engines. Vega is confirmed to have 4 geometry engines. So its most probably 4 shader engines and 4 geometry engines. With each engine powering 16CU (1024sp). AMD say they have improved load balancing and IPC . But we have to wait and see if there are still any bottlenecks or problems with getting the full performance out of the Vega GPU.

http://www.anandtech.com/Gallery/Album/5395#38

Vega is designed to handle upto 11 polygons per clock with 4 geometry engines.

It isn't confirmed. Scott Wasson in an interview with RedGamingTech have said that it may not reflect the exact Shader Engine configuration of ANY Vega GPU.

It is just an example of the performance.

Take it also by logic. 4096 GCN core chip with 4 Shader Engines - Fiji was 596 mm2 die size. Porting it to 14 nm would bring the die to only around 350 mm2. 8 Shader Engines require much more space than just 4. And they have to be arranged differently.

 

[tential]

It isn't confirmed. Scott Wasson in an interview with RedGamingTech have said that it may not reflect the exact Shader Engine configuration of ANY Vega GPU.

It is just an example of the performance.

Take it also by logic. 4096 GCN core chip with 4 Shader Engines - Fiji was 596 mm2 die size. Porting it to 14 nm would bring the die to only around 350 mm2. 8 Shader Engines require much more space than just 4. And they have to be arranged differently.

This is exactly why I asked what are the relevant parts of the interview.

Thanks a lot glo. Can you please explain any parts of the video you found interesting? I honestly don't know enough about getting deep into the nitty gritty of an architecture to understand what's important or not from that video or how much of it is even new info.

 

[Glo.]

This is exactly why I asked what are the relevant parts of the interview.

Thanks a lot glo. Can you please explain any parts of the video you found interesting? I honestly don't know enough about getting deep into the nitty gritty of an architecture to understand what's important or not from that video or how much of it is even new info.

Mostly he have said what has been disclosed by AMD. He also confirmed that there will be more information both in low and high-level disclosed in close future. There was no talk about particular examples like "how much performance gains we can expect from the new GCN iteration", compared to previous generations.

Mostly what he described, is that Vega is designed to empty the pipeline as fast as its possible, from the data, and moving on to next tasks. He did not said this directly, but the general picture created is that this arch is wider, and faster than previous generations. Think about this. 8 Shader Engines, can equal in halving the time needed to execute the pipeline executed, compared to Fiji. Per clock. AMD did not went with the route of saving energy. They increased the throughput possible per watt for this generation of GPUs.

I don't know if he confirmed this, or I have read this somewhere, however Tile-Based Rasterization will require only adding specific drivers. Adding Primitive Shaders - requires rewriting the Game, or at least the part where the game executes the pipeline.

 

[Head1985]

8x shader engine is too much.Its 100% more.You think things like primitive shaders, HBCC, new rasterizer, L2 cache for Rops dont cost any transistors?It will cost alot of space.

Dont create hype train.

Also with 8x SE Vega problaby need to have 96Rops or 128rops.

 

[Glo.]

That is the reason why Vega 10 is bigger than direct 1:1 port of Fiji from 28 nm to 14 nm.

Think about this.

Raven Ridge APU: 16 CU, with 2 Shader Engines, each with 8 CU's.
Vega 11: 48 CU design, with 6 Shader engines, each with 8 CU's.
Vega 10 64 design, with 8 Shader Engines, each with 8 CU's.

 

[Head1985]

Again you think things like primitive shaders, HBCC, new rasterizer, L2 cache for Rops dont cost any transistors?
On top of that 8x SE with 128rops that SKu would be like 600mm2

 

[Glo.]

With two Memory controllers for HBM2? Not really. It falls in line with how big Vega GPU shown by Raja is.

 

[tential]

The new features of Vega 10 do worry me. From what I gathered from the video, when he introduced these new features, it seemed that some may need to be specifically coded for or have support adopted by devs.
It looked to be like a very FORWARD looking architecture. That's great. I'm happy with that if I'm getting an RX 480, but I'm worried these features won't pay off or matter while I own the GPU.
That's the main thing I got from the video, but I didn't want to lead this conversation about the video with this.

If AMD is looking to improve Vega GPU efficiency, it really depends on the workload right? If the workload utilizes AMD features, then it may be extremely efficient. But if it doesn't and or we're talking about games that are out RIGHT NOW, then what?
I can't remember if it was this video, or the Raja one, but he asked "Will this improve my performance in a game like The Witcher 3?" Or something like that, and it didn't even seem like it was extremely confident that the feature would. And that's the largest worry.

Which of these features are ASYNC like features where the benefit won't be realized until years down the road...

 

[Bacon1]

Nothing what AMD has shown tells anything about efficiency. Where did you find it?

Raja talked about it in an interview with Linus ~4:40 in

 

[Det0x]

If AMD is looking to improve Vega GPU efficiency, it really depends on the workload right? If the workload utilizes AMD features, then it may be extremely efficient. But if it doesn't and or we're talking about games that are out RIGHT NOW, then what?
I can't remember if it was this video, or the Raja one, but he asked "Will this improve my performance in a game like The Witcher 3?" Or something like that, and it didn't even seem like it was extremely confident that the feature would. And that's the largest worry.

Which of these features are ASYNC like features where the benefit won't be realized until years down the road...

http://digiworthy.com/2017/01/10/amd-vega-10-outperform-gtx-1080-in-opengl/

Had AMD run Doom demo on OpenGL, Vega 10 should still have outperformed the GTX 1080, claims Koduri. This is important considering from what we’ve seen so far, low level APIs such as DirectX 12 and Vulkan tend to favor AMD’s GCN architecture over Nvidia’s, while the opposite is true for older high level APIs such as OpenGL and DirectX 11.

To put it other way around, if Vega 10 can beat the GTX 1080 in OpenGL, we can expect similar results in DirectX 11 as well, at least when running at higher 4K resolution. At lower resolutions where the game is more CPU bound, you won’t see much of a performance difference between the two cards though.

Koduri, however, expects an exponential increase in the number of DirectX 12 and Vulkan game releases in 2017 than last year – which is something AMD should obviously be excited about.

 

[Glo.]

Raja talked about it in an interview with Linus ~4:40 in

And where in that video he have said they it will mean that GPUs will use less power?

 

[Bacon1]

And where in that video he have said they it will mean that GPUs will use less power?

"We want to get better at our power efficiency, we are putting money where our mouth is."

There was another interview that had more in depth talking about it not sure which one it was though. But why do you think that Vega won't have power efficiency over Polaris?

 

[Glo.]

"We want to get better at our power efficiency, we are putting money where our mouth is."

There was another interview that had more in depth talking about it not sure which one it was though. But why do you think that Vega won't have power efficiency over Polaris?

Efficiency in that sense means that the GPU will have more performance in similar thermal envelope target. For example, you can get 3 times higher framerate from 250W GPU.

It will not make Vega use less power. It means that they can achieve more in that particular power target.

 

[SpaceBeer]

Vega 10 is bellow 500mm2 Raja said that.
And vega have alot things that dont be used in games and take alot of space:
Primitive shaders,HBCC,INT8 compute and maybe fast fp64.
Also some things that will be used in games:
New rasterizer, New L2 cache for rops and load balance.

So i think vega will be still 4x shader engine and 4096/256/64 config just like fiji.

Ok, I didn't know Raja said it'll be less than 500mm^2. Now it makes more sense. Though I think/hope it will have 96 ROPs

 

[CatMerc]

Two points:
1. I have yet to see the claim by "Raja" be verified. The source for "under 500mm^2" was a forum post on a German forum claiming Raja said so. This is hardly a reliable source. When I asked some AMD peeps about if Raja made such a claim, they refused to answer. If the claim was public, there's no reason for them to not say anything.

2. Close up shots of the chip from the front tend to show a size of 530mm^2 +-20mm^2. If you're getting under 500mm^2, you're most likely looking at an angled shot where you need to account for perspective to get an accurate measurement.

I've been looking into this for a while now, and I HIGHLY doubt Vega 10 is less than 500mm^2.

 

[esquared]

We keep going over and over the rules about not talking about NVidia in the AMD subforum and you people keep on doing it.

Four separate times in this thread, the moderators have warned you NOT to talk about NVidia in the AMD subforum, yet you continue. Posts 127,129, 170 and this one.

How about I make this simple. Next time that happens I will remove the offending member(s) from VC&G for 30 days.

I hope that's clear for everyone. I won't make a fifth warning on this subject.


esquared
Anandtech Forum Director

 

[Glo.]

Has anyone seen this patent?

http://www.freepatentsonline.com/20160378565.pdf

It appears to be much refined version of scheduling.

 

[Krteq]

Nice find.... but it's been filed in June 2015, too late for implementing this in Vega I think.

//edit: gramar

 

[Mopetar]

It could still be included, if they only filed the patent around the time they were sending out their design to the fab. You probably wouldn't want to file any sooner than necessary or it just gives the competition a leg up on what you're doing.

One could probably find out by looking back through previous AMD patent filings and determining how long between the filing and when the technology first appeared in shipping products.

The other thing to consider is that even if it is included, how much of a difference does it make? It could be better, but just from a space saving perspective instead of giving vastly increased performance.

 

[t0mt0m]

Is the High Bandwidth Cache controller in Vega called the unified memory controller (internally maybe) or is it something as yet unannounced?

 

[parvadomus]

I think the GPU used in the radeon line is a cut-down version of the Vega10 chip, otherwise the performance and die size ratio is just stupid.
Also the chip shown on the interposer was paired with only 2xhbm2 stacks (8Gb). For it to have a 16Gb configuration (for the Radeon MI25), it should have 4 stacks? That would mean that the Radeon line has 2048-bit wide memory bus (cutted down from 4096-bit) or am I wrong?

 

[CatMerc]

I think the GPU used in the radeon line is a cut-down version of the Vega10 chip, otherwise the performance and die size ratio is just stupid.
Also the chip shown on the interposer was paired with only 2xhbm2 stacks (8Gb). For it to have a 16Gb configuration (for the Radeon MI25), it should have 4 stacks? That would mean that the Radeon line has 2048-bit wide memory bus (cutted down from 4096-bit) or am I wrong?

There are 2GB, 4GB, and 8GB stack options. They could have 16GB with just two stacks.

8GB stacks are probably too expensive for consumers, the MI25 cards will be sold at a very high price tag, and so they can afford to use the highly expensive 8GB stacks.

 

[Dave2150]

I wonder what range of cards Vega will launch with? Will it be just the flagship at launch, or a few cut down versions aswell?

Many are looking at the mass RX480 sales worldwide, and wondering if there'll be a Vega architecture replacement for it releasing soon, though this seems very unlikely to me.

 

[Bacon1]

I wonder what range of cards Vega will launch with? Will it be just the flagship at launch, or a few cut down versions aswell?

Many are looking at the mass RX480 sales worldwide, and wondering if there'll be a Vega architecture replacement for it releasing soon, though this seems very unlikely to me.

There will be at least two. I don't think AMD ever releases just one chip, usually its chip + slightly cut down (which is the best bang/buck). Often at release the cut down ones are even full or mostly full chips and can be software unlocked, and then the later releases are physically cut dies.