Discussion RDNA4 + CDNA3 Architectures Thread

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DisEnchantment

Golden Member
Mar 3, 2017
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With the GFX940 patches in full swing since first week of March, it is looking like MI300 is not far in the distant future!
Usually AMD takes around 3Qs to get the support in LLVM and amdgpu. Lately, since RDNA2 the window they push to add support for new devices is much reduced to prevent leaks.
But looking at the flurry of code in LLVM, it is a lot of commits. Maybe because US Govt is starting to prepare the SW environment for El Capitan (Maybe to avoid slow bring up situation like Frontier for example)

See here for the GFX940 specific commits
Or Phoronix

There is a lot more if you know whom to follow in LLVM review chains (before getting merged to github), but I am not going to link AMD employees.

I am starting to think MI300 will launch around the same time like Hopper probably only a couple of months later!
Although I believe Hopper had problems not having a host CPU capable of doing PCIe 5 in the very near future therefore it might have gotten pushed back a bit until SPR and Genoa arrives later in 2022.
If PVC slips again I believe MI300 could launch before it

This is nuts, MI100/200/300 cadence is impressive.



Previous thread on CDNA2 and RDNA3 here

 
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Jul 27, 2020
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nah, the clock thing is fixed. If RDNA4 launches, it will be clocked higher than RDNA3.
It's funny how it was once thought that GPUs don't need to clock higher. Just increase the number of shader units for more parallel processing power. I suppose at some point, a limit was reached where increasing the number of shader units became too unwieldy and hard to manage so they started focusing on increasing the clocks?
 
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linkgoron

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Mar 9, 2005
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More likely just concentrating all efforts on RDNA5 for a smooth rollout with a very complete stack of SKUs.
Any actual sources regarding this? How is exiting the high-end GPU consumer business for at least two years a decent strategy? It's weird IMO, moving all of the engineers to work on RDNA5. At some point, you have too many engineers on one project, or are you saying saying that AMD doesn't have enough engineers to launch RDNA5 in 2026 and RDNA4 in 2024? They managed to launch a very complete stack with RDNA2 in 2020.

If RDNA4 is such a great architecture, it would make sense for AMD to capitalize now, instead of moving all of their resources to something two years (or more) in the future. RDNA5 may be successful, but it might be yet another RDNA3 failure.
 
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Kepler_L2

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Sep 6, 2020
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Any actual sources regarding this? How is exiting the high-end GPU consumer business for at least two years a decent strategy? It's weird IMO, moving all of the engineers to work on RDNA5. At some point, you have too many engineers on one project, or are you saying saying that AMD doesn't have enough engineers to launch RDNA5 in 2026 and RDNA4 in 2024? They managed to launch a very complete stack with RDNA2 in 2020.

If RDNA4 is such a great architecture, it would make sense for AMD to capitalize now, instead of moving all of their resources to something two years (or more) in the future. RDNA5 may be successful, but it might be yet another RDNA3 failure.
Because RDNA5 will be their biggest uarch stack ever. From low-end to Halo APUs, from $200 to $2000 dGPUs, as well as being used in consoles and datacenter products.
 

linkgoron

Platinum Member
Mar 9, 2005
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Because RDNA5 will be their biggest uarch stack ever. From low-end to Halo APUs, from $200 to $2000 dGPUs, as well as being used in consoles and datacenter products.
How is this different than, say, and other GPU launch? Nvidia has been doing this for years (except APUs) without compromising current GPUs, including refreshes along the way. Is AMD so incompetent that they can't do it without totally sacrificing their whole current lineup? How will they manage RDNA6?
 
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Kepler_L2

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Sep 6, 2020
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How is this different than, say, and other GPU launch? Nvidia has been doing this for years (except APUs) without compromising current GPUs, including refreshes along the way. Is AMD so incompetent that they can't do it without totally sacrificing their whole current lineup? How will they manage RDNA6?
Smaller team, lower budgets.
 

adroc_thurston

Diamond Member
Jul 2, 2023
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Is AMD so incompetent that they can't do it without totally sacrificing their whole current lineup?
They've killed many more RDNA4 parts than just dGPUs, kiddo.
GPGPU roadmap was also rechopped quite considerably but don't think you care.
How is this different than, say, and other GPU launch
That's the post-realignment part, much the same way now-MI350X is one.
 

eek2121

Diamond Member
Aug 2, 2005
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Because RDNA5 will be their biggest uarch stack ever. From low-end to Halo APUs, from $200 to $2000 dGPUs, as well as being used in consoles and datacenter products.

Because GDDR is cheap and available and HBM is neither of that.
Normally I take patents with a grain of salt, especially when open source code somewhat lines up with leaks, but my gut tells me one of two scenarios is playing out:

1) AMD is about to legit troll a whole bunch of us. 100% a possibility.
2) AI hype has reached such a fevered pitch that entire product releases not fitting the narrative are being delayed.

I am inclined to lean on #2 just based on my own knowledge, but there is more evidence that #1 is a possibility, including a vague statement by AMD about not abandoning high end, 2025 launch rumor, the recently surfaced patent, the apparent cancellation of Navi4C, and some other seemingly non-credible stuff I have seen in the dark corners of the internet.

Don’t get me wrong, I have seen no evidence that a chiplet based part exists, but AMD clearly has some stuff under lock and key. I guess we will find out soon.
 

branch_suggestion

Senior member
Aug 4, 2023
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Smaller team, lower budgets.
Importantly NV in client largely runs a tick-tock with major uArch changes every 4 years or so.
So risk management while doing enough to maintain the narrative and ensuring clean execution.
For example Maxwell was only majorly replaced in gaming by Ampere, Turing was lobotomised Volta with a basic ray box/tri accelerator glued on so while a big uArch change was pretty meh in PPA vs Pascal.
 
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