Discussion RDNA4 + CDNA3 Architectures Thread

[DisEnchantment]

With the GFX940 patches in full swing since first week of March, it is looking like MI300 is not far in the distant future!
Usually AMD takes around 3Qs to get the support in LLVM and amdgpu. Lately, since RDNA2 the window they push to add support for new devices is much reduced to prevent leaks.
But looking at the flurry of code in LLVM, it is a lot of commits. Maybe because US Govt is starting to prepare the SW environment for El Capitan (Maybe to avoid slow bring up situation like Frontier for example)

See here for the GFX940 specific commits

History for llvm/lib/Target/AMDGPU - llvm/llvm-project

The LLVM Project is a collection of modular and reusable compiler and toolchain technologies. - History for llvm/lib/Target/AMDGPU - llvm/llvm-project

github.com

Or Phoronix

More AMD "GFX940" Enablement Work Landing In LLVM - Phoronix

www.phoronix.com

There is a lot more if you know whom to follow in LLVM review chains (before getting merged to github), but I am not going to link AMD employees.

I am starting to think MI300 will launch around the same time like Hopper probably only a couple of months later!
Although I believe Hopper had problems not having a host CPU capable of doing PCIe 5 in the very near future therefore it might have gotten pushed back a bit until SPR and Genoa arrives later in 2022.
If PVC slips again I believe MI300 could launch before it

This is nuts, MI100/200/300 cadence is impressive.



Previous thread on CDNA2 and RDNA3 here

Question - Speculation: RDNA3 + CDNA2 Architectures Thread

Man I have been dying to make this one for a while now. First rumours for RDNA3 are here so new thread time! Just going to start off with this one for now: kopite7kimi on Twitter: "@VideoCardz Ah, I mean a simple mcm design with 10240 cores is not enough. Because the lift from RDNA2 to RDNA3...

forums.anandtech.com

 

[Saylick]

View attachment 113400

MALL cache as RAM mode seems interesting.

 

[Saylick]

Level 0 – Legacy Solutions
Level 1 – Software on Traditional GPUs
Level 2 – Ray/Box and Ray/Tri Testers in Hardware
Level 3 – Bounding Volume Hierarchy (BVH) Processing in Hardware
Level 4 – BVH Processing with Coherency Sorting in Hardware
Level 5 – Coherent BVH Processing with Scene Hierarchy Generator in Hardware

Interesting what level is RDNA4 lvl3?

Probably Level 3 at worst, Level 4 at best. RDNA2/3 was already Level 2. ARC is Level 4, Ada is Level 4.

 

[SolidQ]

from PS5pro deep dive about RDNA4 RT

PS5pro AI

 

[Saylick]

Looks like RDNA 4 finally gets something for thread coherency, which means it's Level 4.

Also, Amethyst is not about proprietary features and is a collaboration between Sony and AMD. This is good, if it means FSR4 gets to leverage what's going on under-the-hood in PSSR.

 

[adroc_thurston]

This is good, if it means FSR4 gets to leverage what's going on under-the-hood in PSSR.

ML upscalers are easy. But they're slow.

 

[Mopetar]

I just want an efficient architecture with no major bottlenecks that can run my games at reasonable frame rates without needing to rely on upsampling or other trickery to make bigger bars solely for the purpose of making me feel better about my purchase.

I get that some people are excited about these technologies (and if supported they do give the card longer legs down the road) but I mainly view them as taking resources away from what I want. I don't care how good FSR4 is. I hope to never have to turn it on in the first place.

 

[Win2012R2]

Very interesting lack of dual issue (which works bad, far worse than Nvidia's solution) in PS5 Pro, AMD needs to rethink it for RDNA 5.

 

[Kepler_L2]

Very interesting lack of dual issue (which works bad, far worse than Nvidia's solution) in PS5 Pro, AMD needs to rethink it for RDNA 5.

gfx13 probably uses MI300's method of dual FP32.

 

[Win2012R2]

gfx13 probably uses MI300's method of dual FP32.

Is it more like NVIDIA's implementation, which isn't exactly double speed, but it seems to be a lot better than AMD's? I guess it can only be better than current sad state of affairs.

 

[Saylick]

Is it more like NVIDIA's implementation, which isn't exactly double speed, but it seems to be a lot better than AMD's? I guess it can only be better than current sad state of affairs.

I tried to look into how CDNA 3's dual issue works and based on what I can understand from C&C's article, it still has its limitations, especially since it appears more suited to how GCN works vs RDNA. Nvidia's approach appears to be more flexible overall, imo.

 

[Win2012R2]

Nvidia's approach appears to be more flexible overall, imo

They were first and likely patented the best approach - easy to do when it comes to hardware, moral of the story - much better to be first...

 

[adroc_thurston]

Very interesting lack of dual issue (which works bad, far worse than Nvidia's solution) in PS5 Pro

it works well, but Sony can't break the ISA compat.

 

[gdansk]

They were first and likely patented the best approach - easy to do when it comes to hardware, moral of the story - much better to be first...

There is nothing patentable about dual issue, there is far too much prior art.

 

[Win2012R2]

There is nothing patentable about dual issue, there is far too much prior art.

If so, why did AMD use clearly much inferior implementation?

 

[Win2012R2]

it works well, but Sony can't break the ISA compat.

Well surely it can be software disabled on driver level to avoid generating dual issue for older code and generate it for new one. Sony must have deemed it waste of silicon.

 

[adroc_thurston]

Well surely it can be software disabled on driver level to avoid generating dual issue for older code and generate it for new one.

You don't need to dual-issue anything. You get 1clk w64 instead.

 

[gdansk]

If so, why did AMD use clearly much inferior implementation?

Area...

 

[SolidQ]

Interesting, but i think that 16GB is low + Bandwidth limit

 

[Bigos]

I am still waiting for a day when the game engine developer job - the upscaling - is actually done by game engine developers and not ISV... This stupid precedent is made by Nvidia having enough developers to create a vendor lock in...

 

[soresu]

Interesting, but i think that 16GB is low + Bandwidth limit

Bath tracing?

Is that about computing the path of the rubber duckies? 😂

 

[SolidQ]

Bath tracing?

after bath you're shiny like RT!

 

[blackangus]

Well if you are old enough you would remember the rubber ducky demo =)

 

[marees]

Also, Amethyst is not about proprietary features and is a collaboration between Sony and AMD. This is good, if it means FSR4 gets to leverage what's going on under-the-hood in PSSR.

Looks like Amethyst is a generalized architecture (like Vulkan) for using CNNs. What nvidia is using in Tensor Cores

Sony said this is a 4 year project. So probably something for RDNA 5, 6 (or UDNA 1, 2) & PS6

For PS5 pro, sony has mentioned that they are using register memory as RAM to avoid latency for PSSR (Again no Tensor cores). I wonder if RDNA 4 uses same architecture for FSR 4 ?

 

[adroc_thurston]

For PS5 pro, sony has mentioned that they are using register memory as RAM to avoid latency for PSSR

You always use regs for that. They're regs. That's how shaders work on GPUs to begin with.

 

[marees]

You always use regs for that. They're regs. That's how shaders work on GPUs to begin with.

So FSR 4 with AI upscaling should have back compat to RDNA 3 but may not be effective on RDNA 2 ??

AMD RDNA3 GPUs Can Have A Lot More Vector Registers Than RDNA2 - Phoronix

www.phoronix.com