Discussion RDNA4 + CDNA3 Architectures Thread

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DisEnchantment

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With the GFX940 patches in full swing since first week of March, it is looking like MI300 is not far in the distant future!
Usually AMD takes around 3Qs to get the support in LLVM and amdgpu. Lately, since RDNA2 the window they push to add support for new devices is much reduced to prevent leaks.
But looking at the flurry of code in LLVM, it is a lot of commits. Maybe because US Govt is starting to prepare the SW environment for El Capitan (Maybe to avoid slow bring up situation like Frontier for example)

See here for the GFX940 specific commits
Or Phoronix

There is a lot more if you know whom to follow in LLVM review chains (before getting merged to github), but I am not going to link AMD employees.

I am starting to think MI300 will launch around the same time like Hopper probably only a couple of months later!
Although I believe Hopper had problems not having a host CPU capable of doing PCIe 5 in the very near future therefore it might have gotten pushed back a bit until SPR and Genoa arrives later in 2022.
If PVC slips again I believe MI300 could launch before it

This is nuts, MI100/200/300 cadence is impressive.



Previous thread on CDNA2 and RDNA3 here

 
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Hitman928

Diamond Member
Apr 15, 2012
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There are these ones at Computerbase :


I think he was referring to the chart I posted here: http://www.portvapes.co.uk/?id=Latest-exam-1Z0-876-Dumps&exid=threads/rdna4-cdna3-architectures-thread.2602668/post-41119162

It's in there though, just not on the page you'd probably expect it to be.
 

Hitman928

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Apr 15, 2012
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Apparently they missed this one, it s not in their slide deck, they only have the MI300 comparison.

Yeah, I just noticed, computerbase has the MI300A comparison chart twice. Once where it belongs and once in the MI300X section, clearly just a mistake as the charts from a distance look identical.
 

HurleyBird

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I think they're dropping the ball a bit on marketing (It is AMD, after all).

Even if AMD doesn't think it will be important, they should hammer on the fact that they are beating Nvidia with a much more general approach. They hint at this a bit by comparing to both tensor and CUDA flops, but given the sheer magnitude of the win when limited to just CUDA cores, they should try to draw as much attention to this as possible. For example:

"AI is fast moving, and if you can't keep up you're dead. With Nvidia, you only get high performance using more limited, inflexible tensor units. If the requirements of future models move beyond the capabilities of those units, Nvidia GPUs could become immediately obsolete. With AMD, you get the best of both worlds: the best performing compute platform with the greatest flexibility and no compromises."

Yes, this is FUD with a small grain of truth, stretched to over into an unlikely scenario. But you'd better believe Nvidia would be saying something similar if the products were reversed.
 
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Mopetar

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Being a flop depends more on value per dollar vs the competition.

As long as AMD prices it right they should do fine as most of the revenue from consumer space comes from mid to lower end cards.

The 7800XT is proof of this. It did nothing to fix the woes of RDNA3, but the price was right and it had led to AMD seeing a lot of sales.

They won't sell anything without a halo part.

I dispute this claim. You could argue that they might not sell as much but Polaris well enough considering it was strictly mid-range and the 5700XT also did well even when it was the top-end card in the product stack.

Halo parts do help to make the down-market parts look like attractive alternatives, but they're not strictly necessary. If RDNA4 has no halo part but has the comparable price/performance advantages over alternatives, AMD will do just as well in the market.
 

adroc_thurston

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You could argue that they might not sell as much but Polaris well enough considering it was strictly mid-range and the 5700XT also did well even when it was the top-end card in the product stack.
Both of those parts were horrible for AMD's bottom line.
has the comparable price/performance advantages over alternatives
price/performance is a cope metric for vendors unable to attain a real PPA advantage or turn it into a halo product that commands the entire pricing structure.
 
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soresu

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Dec 19, 2014
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Even if AMD doesn't think it will be important, they should hammer on the fact that they are beating Nvidia with a much more general approach
It's not that general given CDNA is underpinned by replacing the raster gfx silicon in the chip design with matrix units in each CU - so they do still kinda have a similar thing to nVidia's tensor/CUDA core arrangement, albeit with a more integrated layout.

What would seem to be the main factor of their strategy is the chiplet design which has 6x XCD chiplets for the highest end SKU of MI300.

Going with chiplets helps them fab more compute for less cost by allowing them to design a smaller die (cheaper masks) and just multiply it to fill out the SKU.

Just as they did with Ryzen and EPYC.

I guess it remains to be seen if they can manage to pull it off with RDNA4/5 too.

(I say RDNA4 as it's still possible that they could produce a semi custom chip with chiplets between N44/N48 and the RDNA5 rollout)
 

DisEnchantment

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Kepler_L2

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View attachment 90083


GFX 12 added new scalar functions to fetch the SE AIDs. So chiplet based for sure, but not scaled up probably.
Just remnants from the old plans.
 

SolidQ

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Jul 13, 2023
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Just remnants from the old plans.
from latest PS5pro news
  • Architecture is RDNA3, but it's taking ray tracing improvements from RDNA4. BVH traversal will be handled by dedicated RT hardware rather than fully relying on the shaders. It will also include thread reordering to reduce data and execution divergence, something akin to Ada Lovelace SER and Intel Arc's TSU.
Is that true dedicated RT and like "Ser" for RDNA4?
 
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soresu

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from latest PS5pro news
  • Architecture is RDNA3, but it's taking ray tracing improvements from RDNA4. BVH traversal will be handled by dedicated RT hardware rather than fully relying on the shaders. It will also include thread reordering to reduce data and execution divergence, something akin to Ada Lovelace SER and Intel Arc's TSU.
Is that true dedicated RT and like "Ser" for RDNA4?
Depends how closely tied PS5 Pro and RDNA4 design schedules were.

RDNA2 has basically everything in PS5/XSX design and maybe more besides and they came out the same year.

That being said, Polaris came out the same year as PS4 Pro, yet while the Pro GPU was largely Polaris µArch in design it also had the rapid packed math feature that PC Polaris did not.

Xbox One X GPU on the other hand was basically Vega µArch minus rapid packed math, despite coming out a year later than PS4 Pro.
 

soresu

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No, it was GCN2 with packed FP16.
From the horses mouth in this Tweaktown article:

"Our goal with the PS4 Pro is to deliver high-fidelity graphical experiences. With that in mind, we've more than doubled the power of the GPU and adopted many new features from the AMD Polaris architecture as well as several even beyond it," PS4 Pro designer Mark Cerny said at the PlayStation Meeting event.

If he meant it's merely the same GCN2 µArch with Polaris+ bells and whistles he didn't get his point across very well.
 

moinmoin

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RDNA2 has basically everything in PS5/XSX design and maybe more besides and they came out the same year.
RDNA2 is XSX actually. PS5 is somewhere between RDNA1 and 2. Sony seems to be more eager to have its own input in the silicon (think Kraken) whereas Microsoft's console chips are closer to what AMD puts on the market as well.
 

moinmoin

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Jun 1, 2017
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I guess this essentially is what AMD bought Pensando for.

It describes using Pensando's programmable DPU P4 as a NIC to connects GPUs over changing upcoming Ultra Ethernet standards. It then discusses different characteristics and requirements for software and hardware, and ends with a sales pitch for AMD NIC.

I guess it will depend on how much the rest of AMD incorporates and pushes this approach whether it's more than a mere sales pitch for a NIC. Broadcom's recent announcement of supporting IF with its PCIe switches tells me AMD will have to walk a fine line between cooperating and competing with existing networking manufacturers.
 
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