Resistive/Slew Rate Compensation - Need Explanation

[liv303]

Can anyone out there provide a general explanation behind the idea of resistive compensation and slew rate compensation? I can find plenty of sources actually implementing the idea, but none explaining the overall theory behind it.

Help!

 

[liv303]

Hmmmmm....Seems that no one knew the answer! Well, I finally found some information on the subject and I'll share it, just in case anyone was curious.

Resistive/Slew Rate compensation is needed to "compensate" for the variations in operating conditions a chip may experience due to PVT (process, voltage, and temperature) or PCB layout. I have found this "problem" to be a concern for the I/O designers of a particular chip.

 

[blahblah99]

Slew rate compensation in power amplifiers is used to limit the rate at which the output voltage rises... expressed in V/uS (volts per microsecond).

 

[calbear2000]

You've got it right.

Both impedance compensation and slew rate compensation are implemented on I/O circuits that have tight requirements in voltage swing and slew rates. All circuits are prone to PVT variation which can throw off impedance and edge rate targets considerably. Circuit designers implement a feedback closed-loop system to dynamically adjust the driver/predriver of the I/O buffer for this purpose.

I can't go into detail on the impementation due to IP reasons... but I'm curious as to what sources you found that show how to implement the circuitry. Links?

 

[liv303]

I found the information internally at work. Sorry, no links! Thanks for the info!