If AMD has massively improved their memory compression then yes, 128 bit bus + GDDR6 clocked higher than the 1660TI's 12gps could do the ticket, but with current AMD architecture they need WAY more bandwidth to equal NVIDIA.
GTX 1660 Ti has 1.9 GHz Turbo Clock speeds at 1536 CUDA core, and 288 GB/s bandwidth.
Why 1280 GCN core chip, with, lets say, 1,8 - 2 GHz, 256 GB/s of GDDR6 memory bus, be not able to get close to GTX 1660 Ti performance?
Remember guys. It appears AMD may have changed a lot in the structure of SIMDs. Similar changes nvidia made with Maxwell. And in the first place - it allowed them to increase efficiency, because less cores could do more work, and at the same time, the change in the architecture allowed Nvidia to increase the clocks of the GPUs, becaused reduced the memory movement over the GPU.
Why cant you ? Vega20 is 330mm2 and has 300W TDP, so 1/3 of the size or a bit bigger can easily get same heat density. It could prolly even do 120W or so.... I cannot see however small GPU, like 120 mm2 with 128 bit memory bus to consume around 100W of power..
We actually need competition. For the sake of sane prices, we actually need competition.
P.S. If you have RTX 2080 Ti, don't hold your breath for next gen AMD GPUs . They won't be that fast. At least first two dies.
Absolutely.
Do people think AMD people there at Markham, Austin or Orlando just, like, do nothing?
It doesn't. What AMD needs to do is increase INTERNAL Bandwidth of CUs. What if they have done that AND at the same time - made those CUs execute more work at the same time?If AMD has massively improved their memory compression then yes, 128 bit bus + GDDR6 clocked higher than the 1660TI's 12gps could do the ticket, but with current AMD architecture they need WAY more bandwidth to equal NVIDIA.
Why do you guys use previous gen. AMD GPUs as point of view, on architecture, when Navi is much more than just shrink, and added GDDR6 memory?Why cant you ? Vega20 is 330mm2 and has 300W TDP, so 1/3 of the size or a bit bigger can easily get same heat density. It could prolly even do 120W or so.
This however depends just how aggressive amd will want to be with clocks, vega has better perf/W than polaris, really, its just amd wanted to exploit every mhz they could get out of Vega 64 because they wanted it to rival 1080.
Simple vega 56 scaling in games from my card.1560mhz=180W, 1640mhz=250W, 1700mhz=340W, so for another 140mhz you almost have to DOUBLE power.
So, CAN a 120mm2 chip have 100 or even 120W TDP, yea, it can.Will it ? Depends on how much amd will need the clocks to hit certain performance number.
TBH i really think amd should stop with this clock maximizing, it hurts them more than it gives.They become butt of the "furnace" jokes, they have to invest more in power delivery, they should rather go down a step with the performance and release cards at their best perf/W curve, thats what nvidia does, their cards could also easily consume 300-400W if they would just LET their users manage TDP power number like amd does.
But i have little hope for amd to properly manage their tdp, all 3 cards they released recently, vega20 before that polaris30 and before that vega64 were maximized beyond the point of reason.
Uhm, im not saying gcn isnt effecient,it is, just not at the clocks amd is pushing it for desktop cards.PS4/Pro Xbox one/s/x all use the same gcn and they dont require 350-400W, its just that they are clocked at the most efficient point in the voltage curve, polaris for xbox one x , has more shaders and more bandwith (384bit) than desktop polaris(its also on tsmc) but it has lower clocks.I have vega, its very efficient,In the ...1200-1500mhz range.I also dont think thats only shrinked vega, it has larger L2, more instructions, vrr and probably more.BUT its still gcn, for me, its good. I like gcn , but nvidia and lazy programmers made sure that it isnt utilized properly in pc games.But i also think it starts to be, and one reason is turing, its more compute oriented, it has fp16 and so on.Thats why nvidia introduced rtx and are pushing it so heavily, to distinguish themselves in future games.Why do you guys use previous gen. AMD GPUs as point of view, on architecture, when Navi is much more than just shrink, and added GDDR6 memory?
Navi is the basis of next-gen consoles. PS5 and Xbox Anaconda. They have to be efficient-ish. Consoles will have 8 core CPU, clocked relatively low, and around 3584 GCN core GPU chip. It has to be more efficient than Vega 20 was otherwise it will come with 350-400W PSU. Have we seen a console requiring this much power?
It doesn't. What AMD needs to do is increase INTERNAL Bandwidth of CUs. What if they have done that AND at the same time - made those CUs execute more work at the same time?
Why do you guys use previous gen. AMD GPUs as point of view, on architecture, when Navi is much more than just shrink, and added GDDR6 memory?
Navi is the basis of next-gen consoles. PS5 and Xbox Anaconda. They have to be efficient-ish. Consoles will have 8 core CPU, clocked relatively low, and around 3584 GCN core GPU chip. It has to be more efficient than Vega 20 was otherwise it will come with 350-400W PSU. Have we seen a console requiring this much power?
It seems that people confusing NAVI the chip/architecture with NAVI the graphics cards.
Polaris 30 is very efficient and close to Turing TU117 in perf/watt, but Polaris 30 as a card (RX 590) is not.
So, when we talk about NAVI make the distinction between NAVI the chip/architecture and NAVI Graphics Cards.
GFX10_1_Bugs = [
FeatureVcmpxPermlaneHazard,
FeatureVMEMtoScalarWriteHazard,
FeatureSMEMtoVectorWriteHazard,
FeatureInstFwdPrefetchBug,
FeatureVcmpxExecWARHazard,
FeatureLdsBranchVmemWARHazard,
FeatureNSAtoVMEMBug,
FeatureFlatSegmentOffsetBug,
];
and
FeatureLdsMisalignedBug
There is one feature defined but not added to GFX10_1, (FeatureCuMode)FeatureMovrel, FeatureNoSdstCMPX, FeatureVscnt, FeatureRegisterBanking, FeatureVOP3Literal, FeatureNSAEncoding, FeatureMIMG_R128, FeatureNoDataDepHazard,
FeatureMovrel - "Has v_movrel*_b32 instructions"
FeatureNoSdstCMPX - "V_CMPX does not write VCC/SGPR in addition to EXEC"
FeatureVscnt - "Has separate store vscnt counter"
FeatureRegisterBanking - "Has register banking"
FeatureVOP3Literal - "Can use one literal in VOP3"
FeatureNSAEncoding - "Support NSA encoding for image instructions"
FeatureMIMG_R128 - "Support 128-bit texture resources"
FeatureNoDataDepHazard - "Does not need SW waitstates"
All architectures get more efficient as you reduce clocks and power, but the fact that GCN is basically absent from the laptop market - which is the one where efficiency really matters - tells you the truth of GCN's efficiency vs competitors. Particularly with Maxwell Nvidia took a huge step forward, GCN still hasn't done the same and won't do with minor tweaks.
A major rework is required and as others have said the last huge change (from terascale to GCN) was done with a different US team that was let go. The budgets were cut, the work went to China, and as of yet they have failed to live up that US team's standards. I await the next console releases as that I do expect to have major improvements, but I doubt they will filter through to the desktop for a while yet, I mean the console gpu's aren't even finished yet.
Still I am quite happy to be proved wrong - we all agree that more competition is good - but I'm just looking at past performance as an indicator of the future, combined with the fact the console dev work is ongoing and we are also doing a die shrink. That doesn't suggest we'll get big architectural changes right now.
Are these RTG-focused development sites? If so, then yes, the evidence so far is that they do nothing.
What have we actually seen in the way of GCN improvements since Hawaii? Delta color compression, yes, but it's nowhere near as good as Nvidia's. Some cut-and-paste of better 3rd party memory controllers and video codecs - nice to have, but not exactly cutting edge work, and definitely inferior to Nvidia's in-house memory controllers.
Almost all the RTG-specific development has been essentially worthless: HBCC, DSBR, primitive shaders... none of it added up to a hill of beans in the real world; in terms of performance, Vega 10 was essentially just a die-shrunk, overclocked Fiji.
Using a purely $ based argument for the quality of work possible from an employee is very misleading for good analysis. I cost more so I'm better has been shown false many times, as we've seen so 'epically' with AMD and their CPU division.Markham seems more on the software side for engineering if you look at glassdoor.
A huge portion of the hardware engineers for graphics were laid off years ago.
https://semiaccurate.com/2012/10/12/amds-layoffs-target-engineering/
" For sheer numbers, we have been hearing two versions, 10% and 30% of the company, with several sources giving closely related values. Sadly, they are both correct.
The minimum number is 10%, matching last year’s debacle that crippled the company. The 30% is on the engineering side, and Markham is the main target. AMD has gone on a disastrous cycle of cutting jobs and outsourcing, and it isn’t over yet. What so plainly didn’t work last time is going to be repeated in greater numbers this time. This is rank management incompetence."
The actual number was 15% which still translate into 1700 workers.
https://www.theverge.com/2012/10/18...llion-in-q3-will-layoff-15-percent-of-workers
What ended up happening is GPU development shifted from Markham to Shanghai as a cost saving measure as engineers are paid vastly less(1/4 or 1/5). See the picture and article below as proof of this.
View attachment 5992
"Here is a look at some of the engineering team over in Shanghai, China that were responsible for the development of both Polaris and Vega. AMD still has many employees working on Radeon in the United States and Canada, but the bulk of the development for the upcoming chips as been done in China (hardware engineering) and India (software development)."
https://www.legitreviews.com/amd-ra...i-celebrates-china_183243#671l4HAKmzTIjeEs.99
AMD has not remotely recovered in terms of work force. AMD used to have 16800, employees in 2007. In 2018 that number was 10,100 with many of these jobs now in shanghai instead of North America. It was a necessary move to cut costs and to give AMD the possibility of Ryzen, so we can't fault them for that. But the quality of chips since the Shanghai team took over has been inconsistent to mediocre.
There's a reason why pretty much all designs post Hawaii and have been from the Shanghai team and nothing has been credited to the Markham team. It is gone. The Markham team was expendable and this was reflected by Raja in his last year at AMD.
Raja expressed he was so frustrated with the direction resources were going because according to him, AMD underestimated the viability of discrete gpus in the long run and as a result, were cutting workforce and labor from the division. But this didn't mean AMD wanted to get out of the GPU business, but AMD shifted everything for GPU to foreign development for cost saving measures. The implication that the original Markham team still exists doesn't make sense as it would be redundant and would raise cost for AMD to have a Shanghai and Markham team at a time they could not afford it.
The loss in effective manpower and experience during the transition must have been enormous. I wouldn’t be surprised if that set AMD back a year in driver development alone. Large complex software stacks can be bitch to learn, let alone improve - and that assuming excellent documentation, which isn’t always a given.Using a purely $ based argument for the quality of work possible from an employee is very misleading for good analysis. I cost more so I'm better has been shown false many times, as we've seen so 'epically' with AMD and their CPU division.
Using a purely $ based argument for the quality of work possible from an employee is very misleading for good analysis. I cost more so I'm better has been shown false many times, as we've seen so 'epically' with AMD and their CPU division.
Individuals accept lower salaries all of the time for many reasons. For example, with the China one child policy of many years, you would expect that sole child to want to be close to aging parents and settle for a lesser salary than if working in the West. Other countries have different social values to family than the accepted norm in the USA.
AMD had a fab workforce circa 2007. You can't compare both workforce numbers directly.
If History and AMD's track record would be anything to follow, they would NEVER made Zen, Zen+, Zen 2 architectures .History/AMD's track record. Sure, major leaps in efficiency could happen with NAVI, and I hope they do. AMD has had a track record with GCN of doing very small improvements, there being a ton of hype and high expectations (that on paper "should" pencil out) prior to release and then once the reviews are in we inevitably find out that it's meet the new GCN, same as the old GCN.
As someone who works in software engineering and often sees people outsourced there's two ways you can outsource to India/China/Israel:Using a purely $ based argument for the quality of work possible from an employee is very misleading for good analysis. I cost more so I'm better has been shown false many times, as we've seen so 'epically' with AMD and their CPU division.
Individuals accept lower salaries all of the time for many reasons. For example, with the China one child policy of many years, you would expect that sole child to want to be close to aging parents and settle for a lesser salary than if working in the West. Other countries have different social values to family than the accepted norm in the USA.
AMD had a fab workforce circa 2007. You can't compare both workforce numbers directly.
If History and AMD's track record would be anything to follow, they would NEVER made Zen, Zen+, Zen 2 architectures .
And yes. This is THE SAME company.
I'm just happy that it'll be the last GCN architecture. And since it also goes in consoles, it'll be more gaming oriented, unlike Vega.Zen is total departure from Bulldozer based architecture, while Navi, based on all the rumors and leaks so far, is still GCN. I don't see much reason to be hyped about Navi other than it is incremental update from Polaris/Vega, and most of the improvement will come from moving to 7nm, not from the architectural improvement itself.
You do realize that GCN is ISA, and its implementation can be different, depending on the design of the GPUs?Zen is total departure from Bulldozer based architecture, while Navi, based on all the rumors and leaks so far, is still GCN. I don't see much reason to be hyped about Navi other than it is incremental update from Polaris/Vega, and most of the improvement will come from moving to 7nm, not from the architectural improvement itself.
Well, one thing that is abundantly clear is that the Shanghai development team has produced deeply unimpressive results so far.