Too binary. Sales are just kinda low, historically speaking, with disappointing revenues. The 2070 is just to cover what few buyers can be convinced to fork over the cash. 1660Ti, 2080, and 2080Ti are NV's real money-makers in the consumer market. And maybe 1660 but that's questionable.
We ain't getting nowhere. I refuse to deal in hypotheticals that make it easier to defend a poor product price. Just watch how well it sells and then come back later and gloat if hundreds of thousands of units move at those MSPRs or higher. If not . . . weep for AMD.
Given the $379 price for blower style 5700 I do not expect small NAVI to be in the sub $199 range and I'm not paying >$200 to get 10-20% improvement over RX480 three years later. If that is the case I'll be voting with my wallet and staying with RX480 until someone brings an actual value to the table or buying used/refurb from previous generation.In September we will have in sub 199$ price range the choice between small Navi GPU, or GTX 1660 Ti.
Nvidia will lower prices, after Super models are released. GTX 1660 Ti and 1660 cannot cost more than RTX 2060, which should see a 100$ MSRP price drop to 249$. Current MSRP for GTX 1660 Ti is 279$.Given the $379 price for blower style 5700 I do not expect small NAVI to be in the sub $199 range and I'm not paying >$200 to get 10-20% improvement over RX480 three years later. If that is the case I'll be voting with my wallet and staying with RX480 until someone brings an actual value to the table or buying used/refurb from previous generation.
There's no reason for Nvidia to drop the 2060 to $249. The 2060 is based on TU106 which is a large 445mm² chip. That's not going to sale for $249 or even less anytime soon. Nvidia won't hurt their margins this much. That would be dumb in so many was.Nvidia will lower prices, after Super models are released. GTX 1660 Ti and 1660 cannot cost more than RTX 2060, which should see a 100$ MSRP price drop to 249$. Current MSRP for GTX 1660 Ti is 279$.
AMD's GPU which will be slower(?) than GTX 1660 Ti cannot cost more than that GPU.
Considering there will be RTX 2060 Super, they won't hurt their margins that much. TU106 that goes into RTX 2070, and RTX 2060 is essentially the same. They still be selling non-Super GPUs at standard MSRP prices.There's no reason for Nvidia to drop the 2060 to $249. The 2060 is based on TU106 which is a large 445mm² chip. That's not going to sale for $249 or even less anytime soon. Nvidia won't hurt their margins this much. That would be dumb in so many was.
56 CU Vega die has 230W power draw. Why would AMD lock Vega 64 to 40 CU units?
We might be entering an era, where dGPUs are actually really doomed. It might be completely not good idea to design lots of different dies on smaller nodes, like Nvidia does, because the tradeoffs will be too big to.
For standard CMOS nodes sure, but emerging changes in persistent cache (SOT-MRAM replacing SRAM), spintronics and photonic interconnects can potentially offer significant increases in density - if for nothing else because they offer paths to less thermally constrained designs.I will add one thing. GPUs have just 3-4 nodes left for them. That is the reality we face, guys.
For standard CMOS nodes sure, but emerging changes in persistent cache (SOT-MRAM replacing SRAM), spintronics and photonic interconnects can potentially offer significant increases in density - if for nothing else because they offer paths to less thermally constrained designs.
It is possible. But As I have said, Navi 10 is faster than RTX 2070, so it is not pointless GPU.Maybe they wanted to show an architectural comparison. If the 40CUs for the Vega 64 isn't a typo, then their claims are looking like how they used 270X to claim Polaris had 2.5x the power efficiency.
But they are also claiming it beats RTX 2070. Perhaps in the Vega 64 comparison, Navi was underclocked to get max efficiency?
What's the point of Navi then? Use GDDR6 and a small die to increase margins?
Have you ever heard about heat density?Actually, Nvidia has a very good engineering team. They know what they are doing.
dGPUs are not doomed. If anything, slowdown in process will kill any hopes of iGPUs to replace dGPUs. Performance becomes increasingly dependent on power consumption and thermals and dGPUs have heaps of that.
Have you ever heard about heat density?
Im talking about dGPUs. We haven't seen yet any small GPU on 7 nm node, which actually might have better performance per watt ratio than Navi 10, because of the process properties.You don't think high performance iGPUs will have heat density issues? What about 4GHz+ CPUs? Unless you are talking about <10W chips, they'll ALL have issues.
It's all the same. Actually large GPUs can potentially be better at it because they have greater surface area.
GTX 1660 Ti hands down.Im currently on a gtx770 and was watching navi. It's out of my desired pricing so what is the best choice for 1080p on a 200-300$ budget now? 1660 or 1660ti? rx 590?
As a means to an end, I see those advances as a possible path to truly silent and compact computing.The technologies you mentioned will bring revolutionary benefits in completely other ways. Just like the new category was Smartphones, not better desktop computers, those technologies will enable new class of computing.
I think that of all the tech improvements I listed, photonics will be the most troublesome in that regard, owing to the differences in components vs spintronics and electronics.I feel they'll run into similar problems faced with EUV. It costs more, and its harder to do, and with less benefits.
Even on conventional CMOS processes there are ways to cool dies layered/stacked together if you want to stack logic and memory together for greater density vertically.dGPUs are not doomed. If anything, slowdown in process will kill any hopes of iGPUs to replace dGPUs. Performance becomes increasingly dependent on power consumption and thermals and dGPUs have heaps of that.
Putting aside yield, why do you keep saying that TSMC 7nm node is bad for large die designs? Too much variation across the wafer leading to different parts of the die with too large a difference in electrical properties?Im talking about dGPUs. We haven't seen yet any small GPU on 7 nm node, which actually might have better performance per watt ratio than Navi 10, because of the process properties.
Integrated cooling is probably the short term future. Stacking vertically is a lot more energy efficient than horizontal spacing for data movement. Everyone knew this but the thermals were and are the problem. The HBM design philosophy applied to GPUs. Wider, slower, much more power efficient. This, if perfected, gives as the equivalent of several nodes advancement.Even on conventional CMOS processes there are ways to cool dies layered/stacked together if you want to stack logic and memory together for greater density vertically.
Check out DARPA's ICEcool project - they basically created a new thermal silicon via type for micro-fluidic cooling of a chip stack - basically pumping microscopic amounts of liquid directly through channels/vias in the silicon, making the heatplate cap more or less redundant.
FeatureLDSBankCount32, FeatureDLInsts, FeatureDot1Insts, FeatureDot2Insts, FeatureDot5Insts, FeatureDot6Insts, FeatureNSAEncoding, FeatureWavefrontSize64, FeatureScalarStores, FeatureScalarAtomics, FeatureScalarFlatScratchInsts, FeatureLdsMisalignedBug, FeatureDoesNotSupportXNACK,
Electrical properties decrese proportionally with increase in die size, for some reason, that I do not know at this moment.Putting aside yield, why do you keep saying that TSMC 7nm node is bad for large die designs? Too much variation across the wafer leading to different parts of the die with too large a difference in electrical properties?
For standard CMOS nodes sure, but emerging changes in persistent cache (SOT-MRAM replacing SRAM), spintronics and photonic interconnects can potentially offer significant increases in density - if for nothing else because they offer paths to less thermally constrained designs.
The change from SRAM to MRAM has the potential to drastically reduce the area impact of caches on chip, due to the fact that modern MRAM has a much higher density - given the same cache size, I'd say SOT-MRAM could take caches from 25+% of CPU die area to less than a tenth of that. There are also potential power benefits from persistence in MRAM based designs which ARM mentioned lately I think.
I would think that if the Gaussian curve for basic electrical properties is wider for smaller nodes (makes sense from a quantum viewpoint as structures get smaller), the chance of slower sections holding back the whole increases.Electrical properties decrese proportionally with increase in die size, for some reason, that I do not know at this moment.
Zen Chiplets would not be as efficient, as easy to manufacture, and as easy to scale if they would be bigger. We would not see the same CPUs, from power point of view, if AMD would decide to manufacture monolithic dies on N7 process.
Electrical properties decrese proportionally with increase in die size, for some reason, that I do not know at this moment.
Zen Chiplets would not be as efficient, as easy to manufacture, and as easy to scale if they would be bigger. We would not see the same CPUs, from power point of view, if AMD would decide to manufacture monolithic dies on N7 process.
I would think that if the Gaussian curve for basic electrical properties is wider for smaller nodes (makes sense from a quantum viewpoint as structures get smaller), the chance of slower sections holding back the whole increases.