And FinFET should be able to get them to 7 nm without major issues, or so Samsung's Kinam Kim says in a speech to the currently-ongoing ISSCC.
If true, then it appears that the 14/16 nm node was the real bottleneck. Intel are sounding the exact same things as Samsung re: their 10 nm node.
Since EUV litography is still in the middle of nowhere in terms of new technology - yes ASML, I'm looking at you - this is basically what we need.
If true, then it appears that the 14/16 nm node was the real bottleneck. Intel are sounding the exact same things as Samsung re: their 10 nm node.
Since EUV litography is still in the middle of nowhere in terms of new technology - yes ASML, I'm looking at you - this is basically what we need.