Originally posted by: IntelUser2000
Originally posted by: RussianSensation
- There are no 1156 32nm quads on the roadmap in 2010.
- Sandy Bridge is the "tick" in Intel's strategy, which means a new architecture (like Nehalem is to Conroe).
- 32nm Gulftown will just be a shrunken 6-core Nehalem with no architectural improvements and $1k+ price tag to boot as far as I read.
- Sandy Bridge is expected Q1 2011 so it's more like 1.5 years away.
- Even if Sandy Bridge was compatible with 1156, the lack of proper power regulation/circuitry as a result of a new architecture would make it incompatible with the current P55 chipset. Let's not forget how often Intel changes chipsets!
BTW, Sandy Bridge and Nehalem are Tocks. It must have confused people because "Tick" is usually the first in line(you know, from a clock, tick comes before tock), but since they count Pentium D 65nm/Core Duo as Tick,
new architectures are Tock.
It's because the tick/tock are referenced within the process node viewpoint, not the IC architecture. New node always starts with tick, and ends with tock.
Kinda goes to show which one, process vs. architecture, is the one that plays a larger role on the minds of the decision makers. And with no surprise, the world talks about $7B capex numbers, we don't really get all that excited/interested in what Intel is spending on IC design.
Originally posted by: IntelUser2000
The problem on Nehalem is that per core performance didn't go up significantly. Even accounting multi-threading, the improvements lie in average of 20%.
We'll see what happens.
Yeah Nehalam seemed to be about the uncore - IMC, PCU, shared L3$ - and not so much about the core (added SMT, some would say recycled is the appropriate term).
So far what we've seen from Tick/Tock since Core's introduction over Netburst has really been more of a micro-iteration baby-step approach versus an actual new architecture in the sense of the term that I think most people thought Intel was intending to use the term when they splashed "Tock = New Architecture" across all their PR slides.
When folks hear "new architecture" they think P3 vs. P4, P4 vs. Core, K6 vs. K7, K10 vs. BD, etc. We don't think Phenom vs. PhII.
Nehalem brought the ability to process more threads per socket, but as a Tock was it really a new architecture? Look under the hood, how different is the pipeline, execution units, etc? Looking at the core comparison (see that other thread) versus clarkdale and it doesn't look like Sandy bridge is going to be much more of an evolution of Clarkdale's core...again not going to be what people were probably thinking it was intended to be based on Intel's use of the wording "new architecture" in the PR slides.
I know I am making near-baseless nitpicks here, but they reflect a higher expectation I held on my part for seeing single-threaded performance improvements come from this era of 1B xtor budgets...I'm unimpressed with what has come of it all thus far. I get cheaper computing, but not necessarily faster computing these days.