September 22nd ETA for AMD FX processors

[aigomorla]

seriously these fanism has to stop.

Everyone is saying benchmarks benchmarks... well they are out there, and they say bad bios.... bad step bad this...

Well, fine... but when it boils down to it... were all MAD because we feel a complete repeat of Phenom... along with the PR hype which Phenom brought... only to see half the things AMD said was bad and made there cpu unique is now found on Bulldozer.

Remember the "real core" vs "threads" fiasco... and the "true quadcore" cpu nonsense as well...

So what is it now?

This is why were mad... Whats up with the delays... telling us oh its here and reeling it back in going Nope, the public is not worthy...

Am i the only one that feels this way?

 

[Arkaign]

That's a pretty fair summary, though I'm reserving final judgment until I see not just benches which don't matter to me (Pi, Cinebench), but benches in games and encoding. I do agree that it's idiotic when people want to focus only on things that are apparently positive, such as a BD module being technically closer to 2 cores than a SB Core w/HT is, and ignore the warning signs such as pricing suggesting weak performance, or probable weakness with IPC/single-threading, which is still critical to a good fast system these days.

I'm hoping it's more good than bad, or at least that it will serve as the base for a good 2nd try, such as PhI to PhII. Who knows.

But yeah the fanboyistic crap has to go. It only makes one look ridiculous. PARTICULARLY if you come in with a Sept '11 join date with XX posts, and start insulting mods and such. That's just asinine.

 

[996GT2]

That's a pretty fair summary, though I'm reserving final judgment until I see not just benches which don't matter to me (Pi, Cinebench), but benches in games and encoding. I do agree that it's idiotic when people want to focus only on things that are apparently positive, such as a BD module being technically closer to 2 cores than a SB Core w/HT is, and ignore the warning signs such as pricing suggesting weak performance, or probable weakness with IPC/single-threading, which is still critical to a good fast system these days.

I'm hoping it's more good than bad, or at least that it will serve as the base for a good 2nd try, such as PhI to PhII. Who knows.

But yeah the fanboyistic crap has to go. It only makes one look ridiculous. PARTICULARLY if you come in with a Sept '11 join date with XX posts, and start insulting mods and such. That's just asinine.

Heh. Things were much worse over at OCN. We had members like Seronx (who I see just made an account here as NostraSeronx) claiming things like Bulldozer would totally bulldoze Sandy Bridge and that Bulldozer was to be released in August. When I posted a thread containing the benchmarks done by Coolaler, the flaming from AMD fanboys immediately started and mods closed the thread less than 30 minutes after I posted it.

And the sad part is, whenever someone tries to use logic and brings up the low pricing of Bulldozer or the low performance in early benchmarks, the AMD fanboys will just call that person a butthurt Sandy Bridge owner...

I'm glad things haven't gotten as bad on AT yet.

 

[Gundark]

Things are very dfficult for AMD right now. While with Ph2 we could justify sticking with AMD for mb and cpu compatibility ( am3 cpu in am2 mobo ), that is no longer a case. Now, that we actually must buy new motherboard for BD, it's going to be very difficult for AMD to convince us not to go Intel way. I'm looking forward to see how are they planning to do this.

 

[aigomorla]

Things are very dfficult for AMD right now. While with Ph2 we could justify sticking with AMD for mb and cpu compatibility ( am3 cpu in am2 mobo ), that is no longer a case. Now, that we actually must buy new motherboard for BD, it's going to be very difficult for AMD to convince us not to go Intel way. I'm looking forward to see how are they planning to do this.

Im so +1ing this....

Because the outlook in my shoes right now for my friend is X6 and call it a day vs, upgrading the entire thing.

 

[kcidmai]

You and this small band of mentally deficient people that popped out of the woodwork to come here in start fights with mods and long-standing members instead of having a logical discussion on the issues at hand need to stfu and gtfo. If you want to discuss things like a grown up, by all means stay, but this kind of overtly hostile posting style won't fly here for very long.

Fwiw, 'Morla has been an incredibly informative and valued member here for many years now, who has earned a lot of respect, deservedly so. He has proven over the years to indeed have eerily prescient information and a balanced perspective on the issues he discusses. You're a nobody, so telling him to shut up and go away is just laughable.

Well, I'll say what needs saying, when you have mods trolling the forum. whats that really saying about your community. I personally await bulldozer. When I build my next rigt I am going to buy a BD or a SB-E. I will evaluate the performance of each cpu at that time and make a decision.

I refuse to respect someone who definitely does not have the physical hardware making comments hearsay.

I ain't worried about your opinion of what you think a nobody is.

If he can't be objective and discuss the arch, then he shouldn't be participating in the conversation, given his trolling behavior, if I was the admin, I'd revoke that privilege.

You however entitled to follow whomever you choose. I'll go my own way, you'll have a good night.

 

[kcidmai]

Things are very dfficult for AMD right now. While with Ph2 we could justify sticking with AMD for mb and cpu compatibility ( am3 cpu in am2 mobo ), that is no longer a case. Now, that we actually must buy new motherboard for BD, it's going to be very difficult for AMD to convince us not to go Intel way. I'm looking forward to see how are they planning to do this.

Wow, i am so convinced this opinion is grounded in reality. Specifically what do you think is going to happen ? Cray bought plenty of CPU's, other OEM's will as well. If the performance fits the pricing bracket and the product is available and properly marketed, it won't matter.

Just don't tell toyota that they can't stay in business because Ferrari made the F40.

 

[Troll Trolling]

Could you guys please stop arguing about whether Bulldozer is an 8 core or a 4 core?
Thing is, it might no fit the exact definition of a proper core, hell, let's call it an 8 threaded aberration.

If this aberration perform like a 8 core monster, fine, AMD got a winner on their hands.
If not, then, well...

But for God's sake, it is getting annoying to see logical fallacies and misconceptions coming from both sides.

Also, could you guys please stop stating the current leaks as a perfect reflection of what Bulldozer is going to be?
Sure, the current rumors are very ugly for AMD; the problem is: I don't care how Bulldozer performs before release, be it due to a bad stepping, a bad BIOS, whatever, if it is fast at lauch, perfect; if it is slow, damn, less competition therefore higher prices.

Just take your tone down a notch, understand that your opinion is not, in fact, reality and hope that Bulldozer is good enough to drive prices down.

Thank you for your comprehension and have a nice day.

 

[kcidmai]

seriously these fanism has to stop.

Everyone is saying benchmarks benchmarks... well they are out there, and they say bad bios.... bad step bad this...

Well, fine... but when it boils down to it... were all MAD because we feel a complete repeat of Phenom... along with the PR hype which Phenom brought... only to see half the things AMD said was bad and made there cpu unique is now found on Bulldozer.

Remember the "real core" vs "threads" fiasco... and the "true quadcore" cpu nonsense as well...

So what is it now?

This is why were mad... Whats up with the delays... telling us oh its here and reeling it back in going Nope, the public is not worthy...

Am i the only one that feels this way?

I say, looks like some hanky going on. Could be right, could be wrong. That said, I will await the official reviews from reputable reviewers like Anand etc to validate any claims.

Then everyone will have choices to make regarding any purchases that may be forth coming.

No sweat off my balls either way.

 

[aigomorla]

WOW... Mark is going to have a field day on this one...

Mark Cleanup needed on isle 2!

Well, I'll say what needs saying, when you have mods trolling the forum. whats that really saying about your community. I personally await bulldozer. When I build my next rigt I am going to buy a BD or a SB-E. I will evaluate the performance of each cpu at that time and make a decision.

OK this is my last comment to you...

First off how in hell am i trolling?
Second off the part i bolded is such an Oxymoron do you know that?

You and your cars... well here is what u basically said

Right now im gonna wait and see how this Honda Accord behaves before i go off and buy my Mercedez S550.
So Trolling? If your going to troll and hide about doing it... keep your comparisons to a more logical level.

 

[NostaSeronx]

AMD wants to reduce core count while increasing thread count.

Core count went up
:whiste:

This can reduce power as well as reducing die space. One way to do this is to share some resources (like FPU and cache). Thus Bulldozer is designed as a multi-threading CPU, much like Sun's Niagara design (which also uses CMT). Of course not every design (whether its HT or CMT) is perfect and has its caveats/trade-offs (depends on how well its designed and implemented).

Sun's Niagara isn't Bulldozer's CMT

Shared components in Bulldozer shouldn't drop it's performance the decision to drop 1 alu/agu pair from each core could though

Core 0 - 2 macro-ops/4 micro-ops per cycle 2 ALUs/2AGUs
Core 1 - 2 macro-ops/4 micro-ops per cycle 2 ALUs/2AGUs
Core 2 - 2 macro-ops/4 micro-ops per cycle 2 ALUs/2AGUs
Core 3 - 2 macro-ops/4 micro-ops per cycle 2 ALUs/2AGUs
Core 4 - 2 macro-ops/4 micro-ops per cycle 2 ALUs/2AGUs
Core 5 - 2 macro-ops/4 micro-ops per cycle 2 ALUs/2AGUs
Core 6 - 2 macro-ops/4 micro-ops per cycle 2 ALUs/2AGUs
Core 7 - 2 macro-ops/4 micro-ops per cycle 2 ALUs/2AGUs
VMT/FPCP/SMT 0 - 2 128bit FMACs, 2 128bit Integer ALUs, 256bit FP + 256bit Int can occur per cycle
VMT/FPCP/SMT 1 - 2 128bit FMACs, 2 128bit Integer ALUs, 256bit FP + 256bit Int can occur per cycle
VMT/FPCP/SMT 2 - 2 128bit FMACs, 2 128bit Integer ALUs, 256bit FP + 256bit Int can occur per cycle
VMT/FPCP/SMT 3 - 2 128bit FMACs, 2 128bit Integer ALUs, 256bit FP + 256bit Int can occur per cycle
Front-End/VMT 0 - 8 macro-ops per cycle if Fastpath Double, 4 macro-ops per cycle if Fastpath Single
Front-End/VMT 1 - 8 macro-ops per cycle if Fastpath Double, 4 macro-ops per cycle if Fastpath Single
Front-End/VMT 2 - 8 macro-ops per cycle if Fastpath Double, 4 macro-ops per cycle if Fastpath Single
Front-End/VMT 3 - 8 macro-ops per cycle if Fastpath Double, 4 macro-ops per cycle if Fastpath Single

And that is from this
Core 0 - 3 micro-ops 3ALU/3AGU
Core 1 - 3 micro-ops 3ALU/3AGU
Core 2 - 3 micro-ops 3ALU/3AGU
Core 3 - 3 micro-ops 3ALU/3AGU
Core 4 - 3 micro-ops 3ALU/3AGU
Core 5 - 3 micro-ops 3ALU/3AGU
FPCP 0 - 1 128bit Add, 1 128bit Multiply, 1 128bit Misc
FPCP 1 - 1 128bit Add, 1 128bit Multiply, 1 128bit Misc
FPCP 2 - 1 128bit Add, 1 128bit Multiply, 1 128bit Misc
FPCP 3 - 1 128bit Add, 1 128bit Multiply, 1 128bit Misc
FPCP 4 - 1 128bit Add, 1 128bit Multiply, 1 128bit Misc
FPCP 5 - 1 128bit Add, 1 128bit Multiply, 1 128bit Misc

Looks like 19th September has been uneventful (this rumor is busted).

Uneventful because the news of ibuypower selling Bulldozer in fall was leaked on September 18th

 

[Riek]

That's a pretty fair summary, though I'm reserving final judgment until I see not just benches which don't matter to me (Pi, Cinebench), but benches in games and encoding. I do agree that it's idiotic when people want to focus only on things that are apparently positive, such as a BD module being technically closer to 2 cores than a SB Core w/HT is, and ignore the warning signs such as pricing suggesting weak performance, or probable weakness with IPC/single-threading, which is still critical to a good fast system these days.

I do agree it is idiotic when people want to focus only on things that are apparently negative such as BD would have lower IPC than its competitors, and ignore the warning signs that BD would run at much higher frequencies. Which is equally critical to a good fast system these days.

Neither of those points tell anything about BD performance, but having an assumption... and afterwards call it unfailled logic and definite proof that LOW threaded would suck on BD is not something note worthy.
Logic is not determined by making something worse than meets the eye.

980 and 990x also have lower low threaded performance as the SB2600, does that make their low threaded unusable, suck, incompetent, wortheless ?. At this point i won't be suprised if people here started to call fail hen AMD meets the low threaded performance of the 990x but not the 2600. Does that indicate logic driven posts 996GT2? Not in my eyes.

Well, fine... but when it boils down to it... were all MAD because we feel a complete repeat of Phenom... along with the PR hype which Phenom brought... only to see half the things AMD said was bad and made there cpu unique is now found on Bulldozer.

Don't speak for all of us. I don't feel a repeat of Phenom. Actually giving their 19november phenom sheet they set in the movie which made this whole forum go bananas... showed me they have humor and that we jump way to far on info,. References to their own failed launch of a hyped product and everybody walking into it with eyes wide open. The fuzz isn't AMD, the fuzz our us who can't deal properly with data. As indicated above, everybody jumps to conclusions...

It is a shared design -> dooommmed impossible, overhead slow!, Woow more cores for less space perfect!
it has 2ALU+2AGU -> ipc loss, ipc loss. Atom like ipc !!! sucks!!!, ipc increases, finally they get rid of dependancies!!
high frequencies -> woow, super high frequencies!!! hope they have the ipc!!! , doesn't matter ipc sucks sucks!!1 single thread rules the day!
8cores? it has shared components!!! it won't perform like an 8core!!! (yes their is a minimum performance a core needs to get to be called a core!!!), single core performance will suck!!!


Yeah, we as forum members sure have logic on our side! :'). We are like a bunch of monkeys running after a swining banana.

 

[beginner99]

I'm actually getting tired of this discussion...
Single thread doesn't matter!!!!
2-4 threads matter!!!
...
Single thread as a metric has become obsolete in years, almost everything has 2 or more threads, so start using those apps as a metric.
...
But than at least the stupid single thread importance is of the table.

Having a thread for the GUI and one for the work does make an app multi-threaded. however one of those threads will be idle like 99.9% of the time. Software that actually needs multiple cores to run better is pretty rare. Gaming is probably the most prominent one but what else? video encoding? probably 1% of users or less.

I agree that for a typical user here you are right 2-4 threads matter but for most users I would choose a beefy single core over a dual-core Atom with HT any day.

 

[3DVagabond]

Having a thread for the GUI and one for the work does make an app multi-threaded. however one of those threads will be idle like 99.9% of the time. Software that actually needs multiple cores to run better is pretty rare. Gaming is probably the most prominent one but what else? video encoding? probably 1% of users or less.

I agree that for a typical user here you are right 2-4 threads matter but for most users I would choose a beefy single core over a dual-core Atom with HT any day.

Single core/thread performance is important, as you've shown. Even my animation/modeling software, which can scale to 64 cores on it's internal renderer (unlimited, AFAIK, over a network) relies on single thread performance for much else in the program.

Rendering is far and away the most time consuming operation though. As long as the single threaded performance of the processor is "good enough" the overall throughput is more important. That aspect will never be good enough. Even if it could somehow render in real time.

 

[BlueBlazer]

Microarchitecture design doesn't equal core design

The "real" core is what processes the thread and schedules the additives(FPU and GPU)

And there is two such physical cores on the Bulldozer die in each compute unit
while there is only one physical core on the Sandy Bridge die per core that is virtually duplicated

Again, that's incorrect. That is still not a true core. Without the fetch and decode, the integer section is non-functional. If you build a CPU with just integer section, caches, etc but without fetch and decode, then its a non-functional CPU. Even ancient 386SX CPU (without FPU) must have fetch and decode to function. :hmm:

Core count went up
:whiste:

They are not real "cores". Wouldn't it be embarassing if it happens that Intel's 6-core and 4-core CPUs are able to beat AMD's "8-core" CPU? Then there will be those up in arms shouting and asking "what's going on" That's because when someone (like Chew*) told them about what Bulldozer's "cores" really are, they either never believed or listened (and berated the person).

Sun's Niagara isn't Bulldozer's CMT

Shared components in Bulldozer shouldn't drop it's performance the decision to drop 1 alu/agu pair from each core could though........

Despite the differences, its more or less the same thing. Sun's Niagara CPUs have many clusters of integer units sharing resources (like FPU). Bulldozer has two clusters of integer units only.

Uneventful because the news of ibuypower selling Bulldozer in fall was leaked on September 18th

Its uneventful because of rumors like Bulldozer comes on September 19th (which was probably derived from this AMD launches FX series Bulldozer processors on September 19th?)

Because you're so well intentioned and all. Only posting the past few days and all anti-bulldozer and on an alt account to I bet.

I do not have alternate accounts.

 

[Dresdenboy]

@NostaSeronx:
Good work! In addition to your listing of execution ressources we could now add some points, which might have a noticeable effect on performance:

• FP mov elimination
• full availability of shared ressources like the FPU to one thread if the other doesn't need them in one cycle
• the improved tournament prefetcher engines
• enhanced power management making better use of existing (measured) TDP headrooms for boosted P-States (instead of going with a heuristic rule like in Thuban)
• improved OoO capabilities (unified integer schedulers, improved L/S units)

BTW did anyone notice that the blogger who must not be named published AIDA cache+mem scores with roughly twice the L3 copy bandwidth compared to most recent Coolaler results (the FX-8120@4G)? This should be a hint at the "stability" of [f/le]aked results

 

[Dresdenboy]

Again, that's incorrect. That is still not a true core. Without the fetch and decode, the integer section is non-functional. If you build a CPU with just integer section, caches, etc but without fetch and decode, then its a non-functional CPU. Even ancient 386SX CPU (without FPU) must have fetch and decode to function. :hmm:

Is a "true core" in SB able to work on data on it's own or does it need at least the System Agend + DDR3 I/O pads and some PLL to work?

It's kind of an academic question and has been discussed before. You could even look at those integer cores as being able to receive Macro Ops (internal "ISA", kind of VLIW2) from the dispatcher and memory data from the memory subsystem, execute them and return processed data.

Its more or less the same thing. Sun's Niagara CPUs have many clusters of integer units sharing resources (like FPU). Bulldozer has two clusters of integer units only.

Niagara had simple cores and also implemented SMT to run multiple threads on them. It's more the "less of the same thing" part

Its uneventful because of rumors like Bulldozer comes on September 19th (which was probably derived from this AMD launches FX series Bulldozer processors on September 19th?)

If you'd followed my tweets you'd already know that the partly visible date as seen in the Operation Scorpius video is actually November 19th 2007:
http://www.hwupgrade.it/forum/showpost.php?p=35929405&postcount=22930

 

[NostaSeronx]

Again, that's incorrect. That is still not a true core. Without the fetch and decode, the integer section is non-functional. If you build a CPU with just integer section, caches, etc but without fetch and decode, then its a non-functional CPU. Even ancient 386SX CPU (without FPU) must have fetch and decode to function. :hmm:

The Fetch doubled(Fetch Window => 64B(512bits) from 32B(256bits))
The Decode to cores is weird for Phenom II
The Decode could or should have done 6 macro-ops but it only did 3 macro-ops in which the cores could only process 1.5~ macro-ops
The Decode for Bulldozer can pop out 8 macro-ops and each core only needs 2 macro-ops(The scheduler can hold 4 macro-ops)

They are not real "cores". Wouldn't it be embarassing if it happens that Intel's 6-core and 4-core CPUs are able to beat AMD's "8-core" CPU? Then there will be those up in arms shouting and asking "what's going on"?

You are missing two flaws....Bulldozer can do 256bit and FMA...both of which Sandy Bridge can't do :whiste: (My understanding is that AVX for Sandy Bridge is still 128bit)

Its more or less the same thing. Sun's Niagara CPUs have many clusters of integer units sharing resources (like FPU). Bulldozer has two clusters of integer units only.

The FPU was 8 Cores/32 Threads to 1 Floating Point

The FPCP for Bulldozer is 2 Cores/2 Threads to 1 Floating Point that has 4x the bandwidth of K8 and 2x the bandwidth of K10/K10.5

Its uneventful because of rumors like Bulldozer comes on September 19th (which was probably derived from this AMD launches FX series Bulldozer processors on September 19th?)

http://www.ibuypower.com/Info/amd-bulldozer.aspx

I'm talking about this(Fall starts on September 22nd just need those shipping and delivery notices)

MSI 1-2 weeks
Smartidiot 3-4 weeks
Some other dude 3-5 weeks

BTW did anyone notice that the blogger who must not be named published AIDA cache+mem scores with roughly twice the L3 copy bandwidth compared to most recent Coolaler results (the FX-8120@4G)? This should be a hint at the "stability" of [f/le]aked results

The one whos name shall not be spoken did fiddling with the bios....but no clue on anything else

 

[BlueBlazer]

Guess we should all start gearing up for the Sept 22nd launch now

I don't have confidence in that date either (since no announcements of shipping which should come first). :hmm:

Just a note: TDP of the current X6's on 45nm != the TDP of a hypothetical X6 on 32nm.

If not mistaken Chew* also mentioned more or less the same thing as me, on the TDP (when increasing cores). And yes, the TDP of X6 on 32nm may not be the same.

I still believe BD has got to perform higher than the X6 (and a hypothetical X8) on 32nm. Otherwise, why bother? They've already ported Stars to 32nm. Frankly, I'm kind of surprised (I'm guessing capacity constraints here) they aren't releasing 32nm Phenoms. Some of us stuck with 800-series boards (that were compatible with BD last April, not so much anymore) wouldn't mind a cheap X8...

Like I said earlier, we'll have to see what it brings to the table (hopefully soon). Maybe all this bickering will end (when the "smoke clears"). :sneaky:

BTW did anyone notice that the blogger who must not be named published AIDA cache+mem scores with roughly twice the L3 copy bandwidth compared to most recent Coolaler results (the FX-8120@4G)?

You must be talking about OBR's comparison with Phenom II X6?

 

[Soulkeeper]

nasa mentioned a satelite is expected to burn and crash into the earth around the 23rd
1 in 3200 chance it'll hit/kill someone ...

What are the odds this will coincide with bd launch ?

 

[BlueBlazer]

Is a "true core" in SB able to work on data on it's own or does it need at least the System Agend + DDR3 I/O pads and some PLL to work?

I was referring to the core, not the processor overall as every design is different (e.g.: Conroe uses FSB interface, K8 uses HyperTransport and IMC, Nehalem use QPI and IMC, etc).

It's kind of an academic question and has been discussed before. You could even look at those integer cores as being able to receive Macro Ops (internal "ISA", kind of VLIW2) from the dispatcher and memory data from the memory subsystem, execute them and return processed data.

Yes, it can execute (decoded) raw ops. But without the fetch mechanism, nothing is feeding the schedulers. :hmm:

Niagara had simple cores and also implemented SMT to run multiple threads on them. It's more the "less of the same thing" part

Sun's Niagara uses CMT (mostly clusters of ALUs) rather than SMT.

If you'd followed my tweets you'd already know that the partly visible date as seen in the Operation Scorpius video is actually November 19th 2007:
http://www.hwupgrade.it/forum/showpost.php?p=35929405&postcount=22930

I've never believed in that 19th September thingy either. Its just a distraction.

The Fetch doubled(Fetch Window => 64B(512bits) from 32B(256bits))
The Decode to cores is weird for Phenom II
The Decode could or should have done 6 macro-ops but it only did 3 macro-ops in which the cores could only pop out 1.5~ macro-ops
The Decode for Bulldozer can pop out 8 macro-ops and each core only needs 2 macro-ops(The scheduler can hold 4 macro-ops)

Now do you realize that the cluster is not a full core? It never was a true core. Without the other parts (like decode) that makes up a full core, a cluster cannot become a core on its own.

You are missing one flaw....Bulldozer can do 256bit and FMA...both of which Sandy Bridge can't do

Currently most software (outside of specialized and custom ones) do not support FMA4, re-compilation and compiler support are required. Just like 3dNow! (which is an extra AMD feature) which is hardly or almost never used (most software went in favor of SSE and SSE2).

http://www.ibuypower.com/Info/amd-bulldozer.aspx

I'm talking about that(Fall starts on September 22nd just need those shipping and delivery notices)

MSI 1-2 weeks
Smartidiot 3-4 weeks
Some other dude 3-5 weeks

As I've said earlier, its not the iBuyPower thingy (which is only recently, compared to the much earlier 19th September rumors). Some sites even said 26th September. Shipping must come first, before launch (just like Llano's timeline) and should be at least a month ahead of launch. Most of us are more inclined towards mid October (or later).

 

[NostaSeronx]

Now do you realize that the cluster is not a full core? It never was a true core. Without the other parts (like decode) that makes up a full core, a cluster cannot become a core on its own.

Zambezi 8 Core has EIGHT COoO cores and FOUR Independent COoO 256bit FP+ 256bit int coprocessors

Currently most software (outside of specialized and custom ones) do not support FMA4, re-compilation and compiler support are required. Just like 3dNow! (which is an extra AMD feature) which is hardly or almost never used (most software went in favor of SSE and SSE2).

Unlike 3dNow! FMA4 has a much more usefulness....especially Integer FMA4:hmm:

 

[BlueBlazer]

Both cores have a dedicated Fetch and a dedicated Decode

The Floating Point is also dedicated

The fetch and decode are still shared, only the integer section (schedulers, pipelines, ALUs, etc) is duplicated.

Unlike 3dNow! FMA4 has a much more usefulness....especially Integer FMA4:hmm:

As mentioned earlier without re-compilation and compiler support (as well as endorsements), FMA4 may end up like 3dnow! (abandoned). You will probably see it used in few specific programs and custom written software.

 

[NostaSeronx]

The fetch and decode are still shared, only the integer section (schedulers, pipelines, ALUs, etc) is duplicated.

I don't think you understand :whiste:

The Fetch and Decode are not shared...they are split in half and time spliced

The Fetch has 2 32byte Windows and 4 16byte Decoders I wonder why...oh thats right to feed two cores!!! oh silly me

Bulldozer will perform like an 8 core and 256bit workloads it will last till Haswell

As mentioned earlier without re-compilation and compiler support (as well as endorsements), FMA4 may end up like 3dnow! (abandoned). You will probably see it used in few specific programs and custom written software.

FMA4 won't be abandoned or are you implying Nvidia was stupid to even make GPUs that use FMA?

I'm pretty sure that F@H advantage was from FMA and not to point out Bulldozer can do 256bit AVX

F@H is a big thing and FMA has a integer part called XOP and a floating point part called FMA4

XOP is very important for Multimedia

So you have two markets that would just love increased performance the Multimedia market and the High Performance Computing market

I am 40% Multimedia(SSE5 is for this market) and 60% Gaming(Having the Floating Point independent means I can play and record without stutters(stalls in software jargon))

Bitterness 250%
Annoyed that you don't get it 125%

 

[BlueBlazer]

Zambezi has EIGHT threads and FOUR FP units

There, I fixed it for you. The FP unit is really 2x128-bit FMACs, not true 256-bit (both 128-bit FMACs combined for 256-bit operations when required).

I don't think you understand

You are in denial, despite the mounting evidence I've shown coming directly from the creator of CMT and an overclocker who had handled Bulldozer and spoke directly to AMD's engineers. :hmm:

FMA4 won't be abandoned or are you are saying Nvidia was stupid to even make GPUs that use FMA?

I'm pretty sure that F@H advantage was from FMA

Why are you bringing GPUs into the equation? NVIDIA GPUs have drivers (custom/specifically written for the hardware) and also SDKs like CUDA to support GPGPU functions (used in specialized software like F@H, and especially those dealing with HPC). That is a whole different subject.