Something I've been Pondering about Intel and it's Die-Shrinks

[RobertPters77]

So we're all excited for Ivy and it's 22nm transistors, I know.

But what I'm left wondering is why do Foundries even bother shrinking a transistor down to a set size, every year or two? Would it not be more logical to go to a much smaller size and be ahead of the competition? Like say instead of 32nm, go 25nm. Or instead of 22, why not go 10? Besides, from a cost standpoint, the die-shrink doesn't seem to make alot of sense. So what if it's smaller. Whatever cost savings there may be are outweighed by the expense of R&D, and new Machines or converting the existing one's for smaller transistor size. What? You save on sand? How much? Not enough I'm guessing. Is'nt every transistor made from an individual grain?

P.S. Die sizes don't matter to the end user that much. Unless they're super-anal/OCD-ish about it.

And don't tell me about thermals and performance. When we went from 65nm Core 2 to 45nm Core 2, the power envelope stayed the same. Performance was nearly identical, and Clocks barely budged higher. Core 2 45nm was not a new architecture, Like Nehelam was. Case in point: the Q6700 and the Q8400. Identical clocks. Thermal difference was only 10 watts. I thought going from 65 to 45 would've been atleast a 50% power shrink.

65^3= 274,625
45^3 = 91,125
274,625 - 91,125 = 183,500. So it should've been a 66% power shrink if die size remained the same. What happened?


I'm not into the Foundry business so please don't confuse my ignorance for stupidity. I just want an... answer

 

[hawtdawg]

Each die shrink is also part R&D for shrinking to the next size. Also, when they shrink sizes, they can fit more cpu's on each wafer

 

[alyarb]

The amount of R&D it takes to establish a reliable stream of production-quality silicon from one node to the next is stupendous. It would not be cheaper or faster to skip nodes. Intel, AMD, IBM, TSMC, UMC, Samsung and so forth are not thought of as research institutes. They are in the foundry business and they have to fund their research with revenue from selling chips. Simply put, each node gives birth to the next node, both academically and financially. As we approach the physical limits of the basic concept, new materials and shapes are required to get good performance below 20nm, so nodes are getting more expensive as we go.

Penryn was not a geometric shrink of Conroe and mathematical analogies based on the supposed geometry are a little more cumbersome than subtracting a pair of cubes. Someone else will chime in on details like that, but Penryn was basically the most significant "tick" so far, and is not a perfect shrink of Conroe. The total number of transistors increased by 41% going to Penryn. L2 cache went up 50% as did the associativity, fast radix divider, super shuffle engine, SSE4, enhanced virtualization and store forwarding were all added to Penryn. This was all implemented in addition to HKMG, and there was generally a net reduction in TDP, for instance from Kentsfield (105 W) to Yorkfield (95 W).

 

[RobertPters77]

they can fit more cpu's on each wafer

I lose. You Win.

Goodnight everybody.

 

[Tuna-Fish]

But what I'm left wondering is why do Foundries even bother shrinking a transistor down to a set size, every year or two? Would it not be more logical to go to a much smaller size and be ahead of the competition?

If they could, they would. Shrinking always means solving a lot of new challenges. They don't decide to use 32nm today because it fits their roadmap, they use 32nm today because it's the best they can make. The second their boffins solve the problems of manufacturing things at a smaller feature size, they will start shifting into it. In practice, this looks like a steady set of shrinks, every year or two.

What? You save on sand? How much? Not enough I'm guessing. Is'nt every transistor made from an individual grain?

Umm, no. Processors are made from wafers, which are thin slices cut out of very large and pure single crystals of silicon. While sand is cheap, turning it into completely pure (99.999% wouldn't even be close to cutting it. Semiconductor impurities are measured in parts per billion.) and uniform crystals is quite expensive. The manufacturing cost of a processor is more or less equal to it's die size, or the inverse of how many processors they could stick on a wafer. So, shrinking makes processors cheaper.

 

[soccerballtux]

The amount of R&D it takes to establish a reliable stream of production-quality silicon from one node to the next is stupendous. It would not be cheaper or faster to skip nodes. Intel, AMD, IBM, TSMC, UMC, Samsung and so forth are not thought of as research institutes. They are in the foundry business and they have to fund their research with revenue from selling chips. Simply put, each node gives birth to the next node, both academically and financially. As we approach the physical limits of the basic concept, new materials and shapes are required to get good performance below 20nm, so nodes are getting more expensive as we go.

Penryn was not a geometric shrink of Conroe and mathematical analogies based on the supposed geometry are a little more cumbersome than subtracting a pair of cubes. Someone else will chime in on details like that, but Penryn was basically the most significant "tick" so far, and is not a perfect shrink of Conroe. The total number of transistors increased by 41% going to Penryn. L2 cache went up 50% as did the associativity, fast radix divider, super shuffle engine, SSE4, enhanced virtualization and store forwarding were all added to Penryn. This was all implemented in addition to HKMG, and there was generally a net reduction in TDP, for instance from Kentsfield (105 W) to Yorkfield (95 W).

STUPENDOUS AMOUNTS OF RESEARCH!??/!!!!!! OMG!!!

caps caps cap Caps caps

 

[sonoran]

But what I'm left wondering is why do Foundries even bother shrinking a transistor down to a set size, every year or two? Would it not be more logical to go to a much smaller size and be ahead of the competition? Like say instead of 32nm, go 25nm. Or instead of 22, why not go 10?

In addition to the other factors people are posting, there's something else to consider - every shrink requires certain equipment to produce it (especially at the lithography stage). Those tools are made by a handful of manufacturers, and each new generation requires R&D, testing and optimization for adequate yields, etc. It's just not possible to blast 5 generations ahead of everyone else in the world in a flash.

Your cost question makes sense, and a lot of analysis and planning goes into figuring out what each wafer and chip will cost to produce. Companies do die shrinks when and if they determine it to be cost effective. For most small chip companies, the factors you are thinking of would be cost prohibitive - that's why they must rely on foundries, with large customer bases who can support the necessary R&D costs, to produce their chips.

* Not speaking for Intel Corporation *

 

[code65536]

There's also the "die shrink will let us pack in more functionality and/or do the same work with less power", which makes for a more competitive chip, which helps ensure that your company doesn't get stomped by a competitor. Sounds like an important motivator, methinks...

 

[AtenRa]

But what I'm left wondering is why do Foundries even bother shrinking a transistor down to a set size, every year or two? Would it not be more logical to go to a much smaller size and be ahead of the competition? Like say instead of 32nm, go 25nm. Or instead of 22, why not go 10?

It is a big jump from 45nm to 32nm and a much bigger jump from 32nm to 22nm. From 45nm down to 10nm it will take you 10 years and 10x the amount of money.
So at the end of the day you will be stack at 45nm for 10 years and your opponents will introduce a much faster and more efficient CPU every two years and before you reach the 10nm you will be out of money and out of business

 

[OCGuy]

I would just like to say I disagree with your statements on the C2 shrink. My E8400 and e8600 were miles ahead of my E6750

 

[Borealis7]

the same reason MS doesnt release the best-OS-ever-created-with-0-bugs. because then, you wont buy their next product.

 

[Idontcare]

the same reason MS doesnt release the best-OS-ever-created-with-0-bugs. because then, you wont buy their next product.

I can appreciate such a super-cynical perspective, but the truth is far less strategic than the picture you paint here.

The reality of it is that if Microsoft actually attempted to engineer such a product it would take them 15yrs to perfect it and cost such an absurdly ridiculous amount of money that they'd need to charge $50k/license to recover their 15+ yrs worth of investment expenses.

The reason they can get away with selling licenses so cheap (a couple hundred bucks) while still making profits that justify reinvesting into developing new product cycles is because the consumer model allows for some latitude in terms of the bugginess of the code.

If you want to see what happens to the pricing and development timeline for software code that requires perfection you need look no further than the medical, automotive, and aerospace industries (anything that involves the risk of loss of life). NASA, the FAA, nuclear industry, etc.

These industries still operate on software that was developed in the 70's, took a decade+ to develop, and have been ingrained in their systems for the past 2+ decades.

Would it not be more logical to go to a much smaller size and be ahead of the competition? Like say instead of 32nm, go 25nm. Or instead of 22, why not go 10?

They shrink as much as they can while still being able to yield the structures in working/sellable condition.

When Intel released 32nm to be sure they could also produce 10nm xtors. But if they tried to mass manufacture 10nm transistors at the time then the yields would be less than 1/10 of 1%. They'd need to produce 10,000 wafers to yield one sellable die. I.e. it is simply not viable for mass production. So they go with what is, and that is the 32nm stuff at the time.

As time passes they work to make those 10nm xtor more manufacturing worthy.

Rome wasn't built in day.