Question Speculation: RDNA2 + CDNA Architectures thread

[uzzi38]

All die sizes are within 5mm^2. The poster here has been right on some things in the past afaik, and to his credit was the first to saying 505mm^2 for Navi21, which other people have backed up. Even still though, take the following with a pich of salt.

Navi21 - 505mm^2

Navi22 - 340mm^2

Navi23 - 240mm^2

Source is the following post: https://www.ptt.cc/bbs/PC_Shopping/M.1588075782.A.C1E.html

 

[eek2121]

What makes you say that? Why would AMD redesign their layout and change tooling between processes in such a short period of time? It seems like a waste of engineering resources to change the process on concurrent RDNA2 designs.

Consoles are using N7 due to the Zen 2 cores. Navi2X will most certainly be using N7P or (unlikely) possibly N7+.

 

[eek2121]

Ok, Rays is my expression, Floating Point Operations per Second is quite universal. If AMD RT capability is 2-4 RT ops per CU, , then we have a theoretical number in flops. 320-640 floating point operations per seconds RT-wise. Nvidia claims to have double as many RT resources as Cuda cores by just looking at the official information.

But. By looking at that picture again it made me wonder. Bare with me guys!

It also tells us the Xbox xsxsxs have 256, 32 bit fp/s per CU, which translates to 256*80*2(ghz)= 40,9 TF in pure shader perf. Following that lead we can see it issues 7 instructions per clock/ CU. The RT unit mentioned was doing up to 4, but we need some texturing as well aye?! So let's say 2 to count conservatively. that leaves us with ~0,4 x shader performance. Oooor, 16 TF of RT performance.

Now as you have pointed out, there is no way we can compare apples to apples here, but the funny thing is im starting to see why Nvidia is going all out with everything this gen.

You are mixing things up. There is no real way of comparing performance, and comparing Ampere to RDNA2 in consoles makes no sense anyway, since, as I have been hinting at, desktop chips will likely be different.

 

[kurosaki]

If the Ray tracing unit only did 1 simple FP op a cycle there would be no point in it , you would just do those calculations on an ALU. So 1 RT op dispatched from the scheduler will have X amount of Flops , and X is probably variable depending complexity and test type.

Ok, so a bare minimum would be 16 (AMD)TF in RT perf then, looking at raw figures, if it executes 4 ops per cycle, that would already be hilariously good, wouldn't it? (64 TF RT) Any thoughts around the arch? Someone here mentioned that AMD was 1.7 times more efficient than Nvidia in RT. If it is the case, we have, yes what do we have..

 

[maddie]

Ok, so a bare minimum would be 16 (AMD)TF in RT perf then, looking at raw figures, if it executes 4 ops per cycle, that would already be hilariously good, wouldn't it? (64 TF RT) Any thoughts around the arch? Someone here mentioned that AMD was 1.7 times more efficient than Nvidia in RT. If it is the case, we have, yes what do we have..

What we have is angels on pin.

 

[kurosaki]

What we have is angels on pin.

No gut feel whatsoever?

 

[moinmoin]

Of course Samsung is cheaper per wafer, but have you taken into account yields, die sizes and additonal costs in terms of memory selection and board complexity?

Good call. Looking at the vast price discrepancy between 3090 and 3080, both using the same chip GA102, I'd guess yield (for the former) is not looking too good at Samsung.

 

[DDH]

Consoles are using N7 due to the Zen 2 cores. Navi2X will most certainly be using N7P or (unlikely) possibly N7+.

Actually that is not known at this point. MS says 7nm enhanced. However if you take a rudimentary measurement from the die shot you will see the DCUs, GDDR phy's and zen2 chiplets appear to be smaller than Navi10 and Matisse

 

[maddie]

No gut feel whatsoever?

I fear it might be dysentery.

 

[maddie]

Good call. Looking at the vast price discrepancy between 3090 and 3080, both using the same chip GA102, I'd guess yield (for the former) is not looking too good at Samsung.

I would say the yield is terrible. 30W for 1792 shaders and 14 extra faster memory chips.

 

[lobz]

I'm just doing my best to interpret the official documents listing official specs. That's all. A floating point operation is a floating point operation is a... With that said, we could have great differences in efficiency. An Nvidia flop could easily translate into 0,7 AMD-flops, or vice versa in real gaming scenarios due to a lot of factors. Do you remember the release of RDNA1? The amount of TF actually was lower than previous gen of arch, GCN, but still performed much better in gaming. RDNA is a highly developed platform for image rendering, it is a good thing.
I'm just a layman Anandtech member pondering about in lack of real leaks. But honestly, any one with further thoughts? : )

Not yet really, because AMD has not published any number or metric, which would allow to actually compare it to other RT accelerating solutions. That was the main point of my post.

 

[senseamp]

Wafer cost only matters if you can buy more wafers. But remember, Intel has now stepped in and bought up TSMC's spare capacity on 7nm. Even though there was a lot of schadenfreude about that, it's really an absolutely brutal and brilliant power move, because it caps AMD's growth and forces it to make tough choices.
If AMD are supply constrained, which they likely are since CPUs are selling really well and probably in excess of their expectations when they signed their wafer deals, they have to trade off CPU dies vs GPU dies. Then each 75mm2 of tsmc7 wafer really costs them the ~$75 that they could have made by selling it as a Ryzen die. So instead of the ~20cents/mm2 (or whatever their (wafer cost)/(pi*(300mm/2)^2) is) from the foundry, now it's ~$1/mm2. AMD will probably choose to leave some money on the table to do the bare minimum to keep their diehard GPU fans loyal for the future, but I don't expect them to make GPUs both cheap and plentiful when they could use those wafers to make much easier money on the CPU side. Their stock is priced for perfection, they can't afford to leave a lot of money on the table.

 

[eek2121]

Actually that is not known at this point. MS says 7nm enhanced. However if you take a rudimentary measurement from the die shot you will see the DCUs, GDDR phy's and zen2 chiplets appear to be smaller than Navi10 and Matisse

Does that include cache? because the console cores have less of it.

 

[moinmoin]

Does that include cache? because the console cores have less of it.

XSX has the same amount of cores and cache as Renoir, but the cores seem to be smaller.

 

[DDH]

Does that include cache? because the console cores have less of it.

Don't know tbh, i just measured what appeared to be a complete DCU. Thought it was an error, but the size difference was also present in the ggdr bus which was pretty clear.

Definitely not saying it's N7+ though, just we don't know at this stage

 

[A///]

I fear it might be dysentery.

Chipotle then?

 

[maddie]

Wafer cost only matters if you can buy more wafers. But remember, Intel has now stepped in and bought up TSMC's spare capacity on 7nm. Even though there was a lot of schadenfreude about that, it's really an absolutely brutal and brilliant power move, because it caps AMD's growth and forces it to make tough choices.
If AMD are supply constrained, which they likely are since CPUs are selling really well and probably in excess of their expectations when they signed their wafer deals, they have to trade off CPU dies vs GPU dies. Then each 75mm2 of tsmc7 wafer really costs them the ~$75 that they could have made by selling it as a Ryzen die. So instead of the ~20cents/mm2 (or whatever their (wafer cost)/(pi*(300mm/2)^2) is) from the foundry, now it's ~$1/mm2. AMD will probably choose to leave some money on the table to do the bare minimum to keep their diehard GPU fans loyal for the future, but I don't expect them to make GPUs both cheap and plentiful when they could use those wafers to make much easier money on the CPU side. Their stock is priced for perfection, they can't afford to leave a lot of money on the table.

You have to know that TSMC has far better strategic thinking & planning than this, right?

 

[maddie]

Chipotle then?

You have me here. Cultural? I'm not from the US.

 

[senseamp]

You have to know that TSMC has far better strategic thinking & planning than this, right?

TSMC is planning for TSMC, not AMD.

 

[A///]

You have me here. Cultural? I'm not from the US.

Haha, yes. It's a medium sized chain of "quality" fast food. If you're from the UK I'd compare it to Nando's in a way but not really.

Also,

I would say the yield is terrible. 30W for 1792 shaders and 14 extra faster memory chips.

Yes. The price increase in relation to the price regression of other variants makes me think nv priced the 3090, despite it having improved over Turing considerably, at least according to internal benchmarking that's yet to be verified externally, that the yields may be bad enough they want to artificially limit the take rate of the card.

I know DigitalFoundry did a test on some of the cards already, but apparently nv told them what they could and couldn't do.

 

[A///]

But remember, Intel has now stepped in and bought up TSMC's spare capacity on 7nm.

What? Do you mean 6nm? Because that's what Intel bought. There are zero search returns with "Intel buys 7nm wafers at TSMC" anywhere. Intel bought 180,000 wafers @ 6nm. And what spare space was this? Do you mean when Huawei got booted from the production line due to sanctions? You mean how premier customers like Apple, AMD and Qualcomm got first dibs on everything, with Apple taking a large chunk of wafers, right?

If AMD are supply constrained, which they likely are since CPUs are selling really well and probably in excess of their expectations when they signed their wafer deals, they have to trade off CPU dies vs GPU dies. Then each 75mm2 of tsmc7 wafer really costs them the ~$75 that they could have made by selling it as a Ryzen die. So instead of the ~20cents/mm2 (or whatever their (wafer cost)/(pi*(300mm/2)^2) is) from the foundry, now it's ~$1/mm2. AMD will probably choose to leave some money on the table to do the bare minimum to keep their diehard GPU fans loyal for the future, but I don't expect them to make GPUs both cheap and plentiful when they could use those wafers to make much easier money on the CPU side. Their stock is priced for perfection, they can't afford to leave a lot of money on the table.

Right. And you would be aware that AMD realized they didn't order enough and increased their order last fall. And, if you've been asleep the last 9 months, you'd realize there was a global pandemic and computer sales are through the roof in addition to the DIY sector not being able to supply enough products on time.

 

[senseamp]

What? Do you mean 6nm? Because that's what Intel bought. There are zero search returns with "Intel buys 7nm wafers at TSMC" anywhere. Intel bought 180,000 wafers @ 6nm. And what spare space was this? Do you mean when Huawei got booted from the production line due to sanctions? You mean how premier customers like Apple, AMD and Qualcomm got first dibs on everything, with Apple taking a large chunk of wafers, right?

Is 6nm going to be a different fab than 7nm? Because if it's same production line, then it's still eating up fab capacity that could have been used for extra supply for AMD.

 

[dr1337]

Wafer cost only matters if you can buy more wafers. But remember, Intel has now stepped in and bought up TSMC's spare capacity on 7nm. Even though there was a lot of schadenfreude about that, it's really an absolutely brutal and brilliant power move, because it caps AMD's growth and forces it to make tough choices.
If AMD are supply constrained, which they likely are since CPUs are selling really well and probably in excess of their expectations when they signed their wafer deals, they have to trade off CPU dies vs GPU dies. Then each 75mm2 of tsmc7 wafer really costs them the ~$75 that they could have made by selling it as a Ryzen die. So instead of the ~20cents/mm2 (or whatever their (wafer cost)/(pi*(300mm/2)^2) is) from the foundry, now it's ~$1/mm2. AMD will probably choose to leave some money on the table to do the bare minimum to keep their diehard GPU fans loyal for the future, but I don't expect them to make GPUs both cheap and plentiful when they could use those wafers to make much easier money on the CPU side. Their stock is priced for perfection, they can't afford to leave a lot of money on the table.

Okay first off, TSMC has long term contracts with its partners. Even if intel did somehow buy all of their spare capacity you can be assured that AMD has manufacturing contracts that run well into next year. And adding on to that, intel has bought 6nm wafers for 2021 production. There is no reason to assume this would affect AMD in any meaningful way until their contracts expire. And with next gen products almost guaranteed to be using 5nm (zen 4 and rdna 3), intel buying 6nm capacity doesn't matter whichever way you want to spin it.

 

[maddie]

TSMC is planning for TSMC, not AMD.

And this thinking is one important reason why Intel is where they are today. A slow slide directly from refusing Apple way back because, margins. As someone remarked, the butterfly wings flapped.

Who then thought that sending that customer to TSMC would sink their own business.

 

[rainy]

Wafer cost only matters if you can buy more wafers. But remember, Intel has now stepped in and bought up TSMC's spare capacity on 7nm. Even though there was a lot of schadenfreude about that, it's really an absolutely brutal and brilliant power move, because it caps AMD's growth and forces it to make tough choices.

No, you're wrong - Intel made an order for 180,000 wafers in 6nm not 7.
https://www.theburnin.com/industry/intel-orders-180000-6nm-wafers-from-tsmc-2020-07-28/

 

[A///]

Is 6nm going to be a different fab than 7nm? Because if it's same production line, then it's still eating up fab capacity that could have been used for extra supply for AMD.

It's a low cost optimized version of one of their 7nm nodes. They run several 7nm nodes at the same time. EUV vs. DUV, same library, much denser, not a huge improvement vs going from 7nm to 5nm. TSMC owns half of the industries total EUV machines. Let that sink in. It's mind boggling how they've managed to become the leader in such a short time of third party fabs.

5nm is supposedly booked solid, mostly be Apple. I believe their iPhone and iPad processors will be made on that line, as well as their desktop orientated Apple Silicon.