Question Speculation: RDNA3 + CDNA2 Architectures Thread

[uzzi38]

Man I have been dying to make this one for a while now.

First rumours for RDNA3 are here so new thread time!

Just going to start off with this one for now: kopite7kimi on Twitter: "@VideoCardz Ah, I mean a simple mcm design with 10240 cores is not enough. Because the lift from RDNA2 to RDNA3 is much bigger than from RDNA1 to RDNA2. We should expect many big improvements in GFX11. 🤔" / Twitter

 

[leoneazzurro]

Is It really magical?
In desktop RDNA2 is more efficient than the competition in raster, If we exclude 6500xt and 6700XT.
In mobile, they are clocked too high, so power consumption is also high and performance is not so great compared to Nvidia from what I saw.

I have high expectations for RDNA3 in mobile.

Of course it is not magical, it is high level engineering. But it seems to be counter-intuitive after past GPU and CPU experiences.

 

[Karnak]

Note that AMD is able to keep die area down because they moved memory controllers onto MCDs. This alone would allow for higher clocks, to say nothing of being on a node with 40% better power consumption.

That's my guess as well. Due to the MCDs and the GCD being a... "pure" Compute Die now, that alone could probably result in higher clocks without sacrificing any kind of efficiency.

 

[TESKATLIPOKA]

Of course it is not magical, it is high level engineering. But it seems to be counter-intuitive after past GPU and CPU experiences.

My point was that in mobile RDNA2 is not more efficient than the competition, but you are right, that we shouldn't base RDNA3 on previous generations.

 

[maddie]

These high clocks are there because RDNA3 seems to be high area efficient, that is ,by using fewer shaders but with high clocks. What AMD seems to have reached in the recent years, however, is a magical combination of high clocks and reasonable power demands, a trend followed by both their CPU and recently, GPU, divisions.

In this case area efficient does not mean less shaders.

If they really have fitted 2X shaders in the same area of 1, this means roughly 1/2 the number of transistors needed per shader. How, haven't a clue, but this implies much less power for a given operation as less are switching. This is separate to the increased efficiency of the node improvements.

 

[leoneazzurro]

In this case area efficient does not mean less shaders.

If they really have fitted 2X shaders in the same area of 1, this means roughly 1/2 the number of transistors needed per shader. How, haven't a clue, but this implies much less power for a given operation as less are switching. This is separate to the increased efficiency of the node improvements.

I wanted to mean "less shaders than needed with lower clocks". You can reach the same theoretical performance going slow and wide or fast and thin. How, it is still a mistery.

 

[maddie]

I wanted to mean "less shaders than needed with lower clocks". You can reach the same theoretical performance going slow and wide or fast and thin. How, it is still a mistery.

Sure, this generally is always true, but, RDNA3 seems to have drastically changed the compute circuitry to accomplish the same computation with ~ 1/2 the number of transistors. That is what they mean by area efficiency. Power efficiency is the inevitable result of this. Less transistors needed.

By the way, do we even know what is the V/f curve for the 5nm node and library being used? 3.5 GHz might be very well in that linear part of the range.

When is the reveal, do you know?

 

[Saylick]

Sure, this generally is always true, but, RDNA3 seems to have drastically changed the compute circuitry to accomplish the same computation with ~ 1/2 the number of transistors. That is what they mean by area efficiency. Power efficiency is the inevitable result of this. Less transistors needed.

Seems like they took the holistic approach that they used for Rembrandt and applied it more generously for RDNA 3. Would not surprise me if individual MCDs could be powered down if not needed. Also, Uzzi38 or KeplerL2 linked a patent in the past where the GPU could simply store/output from the current frame within the cache and shut-down the rest of the GPU if there was nothing changing on the display, i.e. idle situations. This would really help in laptops where battery life matters.

Contributing to this energy-conscious design, AMD RDNA™ 3 refines the AMD RDNA™ 2 adaptive power management technology to set workload-specific operating points, ensuring each component of the GPU uses only the power it requires for optimal performance. The new architecture also introduces a new generation of AMD Infinity Cache™, projected to offer even higher-density, lower-power caches to reduce the power needs of graphics memory, helping to cement AMD RDNA™ 3 and Radeon™ graphics as a true leader in efficiency.

 

[jpiniero]

When is the reveal, do you know?

Well, the RDNA 2 reveal was on October 28th. The first cards were released November 18th. Perhaps they will stick to a similar schedule.

 

[TESKATLIPOKA]

N23(16WGP:2048SP:128TMU:64ROP:128bit 17.5GHz)
vs
N33(16WGP:4096SP:128TMU? :64ROP? :128bit 20GHz ?)

	RX 6650 XT	N33	Difference
Frequency	2651 MHz	>3600 MHz	+36 %
Processing power	10,859 GFlops	>29,491 GFlops	+172 %
Texture Fillrate	339 GT/s	461 GT/s	+36 %
Pixel Fillrate	170 GP/s	230 GP/s	+36 %
Bandwidth	280 GB/s	320 GB/s	+14 %

Not sure about the number of TMUs an ROPs, but It probably will stay unchanged.

Processing power will increase by a gigantic step, we will have to see how much will be the rest of the chip a bottleneck.

 

[GodisanAtheist]

Wonder if we're going to get the return of hotclocks and independent clock domains with the advent of the chiplet design.

Back in ye olde days NV used to run it's shaders at 2x the speed of its I/o. All that stopped I think with the Kepler arch, but it would be kinda wild for AMD to bring it back.

Run I/O at a half step of the GCD and IC for global power savings, and then throw hyper localized power control on top of that.

 

[HurleyBird]

AMD needs to go Halo. Dump whatever you need to into your top SKU to either get or convincingly contest the performance crown at the top. You can always pare back from the top, but you cannot add more to an inherently underdeveloped die to get the crown and win the hearts and minds of retail users.

I agree almost 100%, with one small caveat:

If you know the competition is going to take the performance crown and is *also* going to beat you everywhere else, then, and only then, it might make sense to go for value and marketshare. Your reputation is going to be in tatters for awhile regardless of any actions you take. For example, Fury X did absolutely nothing for AMD, because even though it was really close to the 980 Ti in overall performance, and not too far away from the Titan X either, it was just a bit worse in every dimension and came out later.

What makes RV770 so damn frustrating is that AMD could have easily taken the performance crown if they had just produced a larger die, and after the R600 fiasco they really needed to in order to rehabilitate their reputation (just as Nvidia rehabilitated theirs by following up the terrible fx series with the amazing NV40 and co), but decided not to, cemented their reputation as an also-ran, and then proceeded to ceaselessly pat themselves on the back about how smart their "sweet spot" strategy was.

 

[GodisanAtheist]

I agree almost 100%, with one small caveat:

If you know the competition is going to take the performance crown and is *also* going to beat you everywhere else, then, and only then, it might make sense to go for value and marketshare. Your reputation is going to be in tatters for awhile regardless of any actions you take. For example, Fury X did absolutely nothing for AMD, because even though it was really close to the 980 Ti in overall performance, and not too far away from the Titan X either, it was just a bit worse in every dimension and came out later.

What makes RV770 so damn frustrating is that AMD could have easily taken the performance crown if they had just produced a larger die, and after the R600 fiasco they really needed to in order to rehabilitate their reputation (just as Nvidia rehabilitated theirs by following up the terrible fx series with the amazing NV40 and co), but decided not to, cemented their reputation as an also-ran, and then proceeded to ceaselessly pat themselves on the back about how smart their "sweet spot" strategy was.

- Fury got absolutely curbstomped by the 980ti. It was close reference vs reference, but when you take AIB partner cards into account that built in the 980Ti's absolutely ludicrous clock headroom (reference was like 1175Mhz core while AIB was 1500+) the 980ti left Fury in the dust. Throw on 6gb of ram rather than 4 and that was all she wrote. Fury wasn't a bad design, but Maxwell was an absolutely S-tier arch.

Agreed wholeheartedly on the RV770 bit.

 

[Saylick]

I agree almost 100%, with one small caveat:

If you know the competition is going to take the performance crown and is *also* going to beat you everywhere else, then, and only then, it might make sense to go for value and marketshare. Your reputation is going to be in tatters for awhile regardless of any actions you take. For example, Fury X did absolutely nothing for AMD, because even though it was really close to the 980 Ti in overall performance, and not too far away from the Titan X either, it was just a bit worse in every dimension and came out later.

What makes RV770 so damn frustrating is that AMD could have easily taken the performance crown if they had just produced a larger die, and after the R600 fiasco they really needed to in order to rehabilitate their reputation (just as Nvidia rehabilitated theirs by following up the terrible fx series with the amazing NV40 and co), but decided not to, cemented their reputation as an also-ran, and then proceeded to ceaselessly pat themselves on the back about how smart their "sweet spot" strategy was.

I think the calculus for a small die strategy today is very different than the AMD 10 years ago. I think in hindsight the market share gains didn't exactly help AMD because their profit margins didn't increase; it just allowed them to compete with better bang per buck products. Today, the focus on perf/area and specifically using a very reasonable size for the N31 GCD dies has a direct impact on the gross profitability of the company because there is a finite amount of N5 wafers and N5 wafers are expensive. Every mm2 of N5 that is used on consumer GPUs is N5 that is NOT used for N5 Zen 4 CCDs, where the profit per area is much, much higher. As much as people want to see AMD make a larger die to contest the full AD102 at the high end, the amount of revenue gained to contest that segment of the consumer GPU market (i.e. mostly just enthusiasts) probably pales in comparison to the amount of revenue gained by using that area instead for Genoa and Genoa-X. For what it's worth, N31 is anticipated to double N21's performance, with a larger increase in RT, which is pretty dang good already. Keep in mind that AMD/Nvidia don't know exactly what performance bracket each other will shoot for. Historically, Nvidia has only brought on 50-70% increase each gen for the last few generations. AD102 being >2x faster than GA102 is not normal considering the last time we saw Nvidia pull out something that large gen-on-gen was G80, so for AMD to target a 2x improvement likely would have gotten them on par with a hypothetical 1.7x GA102.

 

[maddie]

I agree almost 100%, with one small caveat:

If you know the competition is going to take the performance crown and is *also* going to beat you everywhere else, then, and only then, it might make sense to go for value and marketshare. Your reputation is going to be in tatters for awhile regardless of any actions you take. For example, Fury X did absolutely nothing for AMD, because even though it was really close to the 980 Ti in overall performance, and not too far away from the Titan X either, it was just a bit worse in every dimension and came out later.

What makes RV770 so damn frustrating is that AMD could have easily taken the performance crown if they had just produced a larger die, and after the R600 fiasco they really needed to in order to rehabilitate their reputation (just as Nvidia rehabilitated theirs by following up the terrible fx series with the amazing NV40 and co), but decided not to, cemented their reputation as an also-ran, and then proceeded to ceaselessly pat themselves on the back about how smart their "sweet spot" strategy was.

The days when SLI & Crossfire were a thing and might have played a part in their thinking for getting higher performance. The 4870X2 and 4850X2 were released.

Quite a few similarities with the Zen1 philosophy.

 

[HurleyBird]

As much as people want to see AMD make a larger die to contest the full AD102 at the high end, the amount of revenue gained to contest that segment of the consumer GPU market (i.e. mostly just enthusiasts) probably pales in comparison to the amount of revenue gained by using that area instead for Genoa and Genoa-X.

Even if AMD had a crystal ball (which they certainly did not) and predicted the GPU market crash, that mentality would still be extremely short sighted. If AMD could have better leveraged chiplets to, say, beat Nvidia's best by >30% with a ~500mm2 GCD, then that would have simply obliterated Nvidia's mindshare in consumer GPUs, sent Nvidia's massively inflated stock price down to earth, and would have made life extremely difficult for one of their main competitors. In that respect, the GPU market crash would actually help AMD to neuter Nvidia.

There's more to it than short term profits. But I'm not sure that argument is even a valid one. They're called halo products for a reason. Just because you have a huge die flagship does not mean you need to flood the market with them. Limit production, and price them according to supply and demand, and now, thanks to the mindshare you've created, you can price everything else a bit higher than you could otherwise.

It's hard to exaggerate how important mindshare is as a market force, and one also needs to understand that mindshare changes can happen very fast of very slow depending on context. By all rights, AMD should have captured over 80% server marketshare by this point. They're significantly under 20% and that's because of mindshare. To flip things around, a main reason Alder Lake sold worse than Intel expected is because AMD was actually able to capture significant mindshare in desktops. Mindshare in graphics can change slowly if you have relatively competitive products, but happens on a dime when you are dominant. A 500mm2 GCD might have been significantly more dominant than either R300 or G80.

 

[Saylick]

Even if AMD had a crystal ball (which they certainly did not) and predicted the GPU market crash, that mentality would still be extremely short sighted. If AMD could have better leveraged chiplets to, say, beat Nvidia's best by >30% with a ~500mm2 GCD, then that would have simply obliterated Nvidia's mindshare in consumer GPUs, sent Nvidia's massively inflated stock price down to earth, and would have made life extremely difficult for one of their main competitors. In that respect, the GPU market crash would actually help AMD to neuter Nvidia.

It's hard to exaggerate how important mindshare is as a market force. One also needs to understand that mindshare changes can be very fast of very slow depending on context. By all rights, AMD should have captured over 80% server marketshare by this point. They're significantly under 20% because of mindshare. To flip things around a bit, a reason Alder Lake sold worse than Intel expected it to is because AMD was actually able to capture significant mindshare in desktops. Mindshare in graphics can change slowly if you have relatively competitive products, but happens on a dime when you are dominantly competitive. And a 500mm2 GCD might have been significantly more dominant than either R300 or G80.

I think AMD's goal is to keep the foot on the throttle to take more CPU marketshare from Intel, rather than to accelerate fully on the consumer GPU side. AMD already has a foothold in the server CPU space and it's likely their window of opportunity shrinks in a few years. Better to claw as much server marketshare and mindshare now rather than go all out against Nvidia, where they do not have the same foothold at all. It is very possible that even if AMD took the crown this generation, it may not even make a dent in Nvidia's mindshare and any marketshare gains could get reversed next generation. Long term strategy dictates that AMD secure their foothold in the CPU server space for the years to come, even with a resurgent Intel, so that they have the financial horsepower to apply yearly pressure to Nvidia. If they back off on servers to win one, maybe two, GPU generations from Nvidia, it's nowhere near as permanent.

Also, keep in mind that this is still AMD's first take on using a chiplet strategy in the consumer GPU space. It's easy from the consumer's standpoint to say, "Why can't AMD just take the chiplet concept to the max on their first attempt?", but alas hardware engineering isn't easy. RDNA 4 will be the generation where AMD presses their chiplet technology to the max.

 

[Tuna-Fish]

N23(16WGP:2048SP:128TMU:64ROP:128bit 17.5GHz)
vs
N33(16WGP:4096SP:128TMU? :64ROP? :128bit 20GHz ?)

I think there's a good chance that the extreme clocks only apply to the 5nm GPUs, that is, N31 and N32.

 

[moinmoin]

My impression is that today's AMD is fundamentally economically conservative and puts research majorly into ways to scale up and out while keeping overall investment stable. So the primary target is highest possible flexibility and scaling with the lowest possible investment.

The result in the CPU market is known. With CDNA2/MI200 AMD also found a way to scale server compute without increasing die size in an outrageous way.

It seems that point isn't reached quite yet with RDNA3 in client GPUs. Though splitting out IMCs and IC in separate chiplets allows increasing and optimizing the GC die further until a mainstream capable way of bridging several GCDs with high bandwidth links is found.

(The contrast to Intel's SPR and Apple's M1 Ultra, both with very costly no compromise interconnects, is very high there. I don't expect AMD to ever choose such a route, maybe unless a big customer asks and pays for such.)

 

[Saylick]

My impression is that today's AMD is fundamentally economically conservative and puts research majorly into ways to scale up and out while keeping overall investment stable. So the primary target is highest possible flexibility and scaling with the lowest possible investment.

The result in the CPU market is known. With CDNA2/MI200 AMD also found a way to scale server compute without increasing die size in an outrageous way.

It seems that point isn't reached quite yet with RDNA3 in client GPUs. Though splitting out IMCs and IC in separate chiplets allows increasing and optimizing the GC die further until a mainstream capable way of bridging several GCDs with high bandwidth links is found.

(The contrast to Intel's SPR and Apple's M1 Ultra, both with very costly no compromise interconnects, is very high there. I don't expect AMD to ever choose such a route, maybe unless a big customer asks and pays for such.)

FWIW, and I'm sure you're aware of this, but large monolithic dies are not going to be possible in a few short years once High NA EUV takes off. The reticle limit today lets Intel and Nvidia to keep pumping out large >400 mm2 dies, but that won't be a possibility when the reticle limit is <300 mm2. At some point, everyone is going to have to figure out how to scale up and out using smaller chiplets, ideally in an economical fashion as well. The companies who figure this out last won't be able to compete at the upper echelons of high performance computing. You're right in that AMD is focusing its efforts on avoiding going down the tried and true route of just throwing larger individual dies at the problem to scale up performance. A 500mm2 GCD is totally possible, but that would be going down the traditional route. AMD, like you said, would prefer to use two 300mm2 dies instead because at least the 300mm2 option has a viable future. Making 500mm2+ dies each generation is a dead end path. Maybe AMD has an ace up its sleeve with a dual N32 GPU.

 

[HurleyBird]

I think AMD's goal is to keep the foot on the throttle to take more CPU marketshare from Intel, rather than to accelerate fully on the consumer GPU side.

Given that I don't think AMD management is stupid anymore, my bet is that they're either sandbagging on GPUs (a bigger GCD or multi-GCD product is coming, but has been well hidden), or they tried to do multi-GCD and failed.

It is very possible that even if AMD took the crown this generation, it may not even make a dent in Nvidia's mindshare and any marketshare gains could get reversed next generation.

If AMD took the crown by 30% with a ~500mm2 GCD, which is very possibly conservative as Nvidia wouldn't bother boosting power consumption so much if they knew they were going to lose so badly, then reversing those mindshare gains in a single generation would require a very one-sided generation indeed. If they lost the next generation by only a small margin, AMD would still retain much of their mindshare (eg. 9700/9800 pro -> x800xt/x). But what if AMD actually won the next generation too? Even if it were to only be a moderate win, then Nvidia would probably be cemented as the 2nd rate brand. You'd effectively see the G80->GT200 / R600->RV770 timeframe, but in reverse.

Long term strategy dictates that AMD secure their foothold in the CPU server space for the years to come, even with a resurgent Intel, so that they have the financial horsepower to apply yearly pressure to Nvidia. If they back off on servers to win one, maybe two, GPU generations from Nvidia, it's nowhere near as permanent.

You have no evidence whatsoever that producing a ~500mm2 (or ~425mm2, or whatever) GCD would somehow cause AMD to lose in the server space. Pure speculation. You could also say that AMD shouldn't have designed Phoenix Point because they could have put that effort into servers, and that would be just as ridiculous. Sure, TNSTAAFL is a thing, but also realize that AMD designs an enormous number of different dies. Capturing the lion's share of consumer GPU mindshare (and increasing ASPs on every other GPU) is easily worth the effort.

Lastly, consider that AMD's problem in the server space isn't performance, it's mindshare. And mindshare is force multiplicative across markets. Winning in one market increases your mindshare in others. If Ryzen were performing like Bulldozer, it would be more difficult to market RDNA, and so on.

Also, keep in mind that this is still AMD's first take on using a chiplet strategy in the consumer GPU space. It's easy from the consumer's standpoint to say, "Why can't AMD just take the chiplet concept to the max on their first attempt?", but alas hardware engineering isn't easy. RDNA 4 will be the generation where AMD presses their chiplet technology to the max.

Making a larger GCD is not "taking the chiplet strategy to the max."

 

[Saylick]

Given that I don't think AMD management is stupid anymore, my bet is that they're either sandbagging on GPUs (a bigger GCD or multi-GCD product is coming, but has been well hidden), or they tried to do multi-GCD and failed.

Maybe they are sandbagging. Wouldn't be the first time now.

If AMD took the crown by 30% with a ~500mm2 GCD, which is very possibly conservative as Nvidia wouldn't bother boosting power consumption so much if they knew they were going to lose so badly, then reversing those mindshare gains in a single generation would require a very one-sided generation indeed. If they lost the next generation by only a small margin, AMD would still retain much of their mindshare (eg. 9700/9800 pro -> x800xt/x). But what if AMD actually won the next generation too? Even if it were to only be a moderate win, then Nvidia would probably be cemented as the 2nd rate brand. You'd effectively see the G80->GT200 / R600->RV770 timeframe, but in reverse.

You have no evidence whatsoever that producing a ~500mm2 (or ~425mm2, or whatever) GCD would somehow cause AMD to lose in the server space. Pure speculation. You could also say that AMD shouldn't have designed Phoenix Point because they could have put that effort into servers, and that would be just as ridiculous. Sure, TNSTAAFL is a thing, but also realize that AMD designs an enormous number of different dies. Capturing the lion's share of consumer GPU mindshare (and increasing ASPs on every other GPU) is easily worth the effort.

I didn't say that making a 500mm2 GCD would make AMD lose in the server space. I said that making a 500mm2 GCD would mean less wafers for CPUs in the server space. Wafer allocations are all set far in advance, so they have to maximize profit for the budget spent on cutting edge wafers. AMD was already supply constrained in the server space and couldn't grab market share as fast as they'd like; customers were waiting months just to get Milan. With a dominant server product that will sell like gangbusters, it makes sense that most of the N5 wafers be allocated towards Genoa and other high margin products. Consumer GPUs have traditionally not been as high margin as enterprise. As to your point regarding capturing the lion's share of consumer GPU mindshare, targeting the performance tiers up to the RTX 4090 is likely >80% of the market. It's likely even higher, i.e. I think less than 10% of consumers buys the Titan or the xx90 Ti. As for ASPs, RDNA 3 may not increase it much, if at all, but it should cost less for AMD to make so their profit margin is higher.

Lastly, consider that AMD's problem in the server space isn't performance, it's mindshare. And mindshare is force multiplicative across markets. Winning in one market increases your mindshare in others. If Ryzen were performing like Bulldozer, it would be more difficult to market RDNA, and so on.

Agreed that mindshare in one market has a positive impact on other markets. Having an overclocked N31 be roughly equivalent to an RTX 4090 at 450W is pretty good already in my opinion, especially if N31 is a few hundred dollars cheaper.

Making a larger GCD is not "taking the chiplet strategy to the max."

See my response in my post above regarding 500mm2 dies.

See above in bold for my responses.

 

[HurleyBird]

I didn't say that making a 500mm2 GCD would make AMD lose in the server space. I said that making a 500mm2 GCD would mean less wafers for CPUs in the server space.

They're called halo products for a reason. Just because you have a huge die flagship does not mean you need to flood the market with them. Limit production, and price them according to supply and demand, and now, thanks to the mindshare you've created, you can price everything else a bit higher than you could otherwise.

 

[Gideon]

HXL on Twitter: "Almost 4Ghz GPU😱 https://t.co/CC97YL9Nov" / Twitter

Almost 4 Ghz for RDNA3?

To me the most striking part about this is the stark difference between the AMD of today vs yesteryear.

Remember, when Vega 10 used up the bulk of the transistors to enable more clock speed and failed miserably?
I wouldn't be surprised if Navi 21 is actually the first chip where AMD used machine-learning tools extensively to extract so much clock headroom on the same node as the predecessor.

 

[moinmoin]

I wouldn't be surprised if Navi 21 is actually the first chip where AMD used machine-learning tools extensively to extract so much clock headroom on the same node as the predecessor.

That would be funny considering after the merger with ATi it was the ATi side that already worked with plenty automation and AMD's CPUs took ages catching up, getting rid of hand made designs. But it's obvious that the CPU side got ahead with let's call them node/frequency optimizations and the GPU side is now more and more profiting of them as well.

 

[naad]

With those clocks no wonder AMD is confident with a significantly smaller die, in a ROP limited scenario we've seen repeated for years on mid-high end SKUs pixel pushing suffered the most, a fast frontend doesn't help a slow backend.

Reminds me of the situation when the new consoles released a few years ago, Sony's ps5 had a significant CU disadvantage against xbox , but pixel fillrate was similar (clocks vs shaders)