Der8auer thinks that 5ghz is very very realistic. He claims that he got industry sources.
Hope he's right.
Yeah, higher clocks wouldn't hurt. I'd still also like to see at least some IPC gains in single-threaded integer workloads as well. Which should be the case, considering the widened frontendAgree because as long as Intel has a relevant lead in ST performance, then adding more cores only helps so much for AMD. I don't need 12 or 16 cores. I'm better served by 8 faster ones.
You likely are spot on. But you are only talking about Intel's 14nm process node.Ryzen 3000 desktop part production costs will undoubtedly be more than Intels parts, and almost certainly more than Ryzen 2000 parts.
Anand estimates 9900K die to be ~177 mm2. This is NOT a large die. Not large enough that breaking into smaller pieces would significantly improve yield.
Anands estimate for combined Ryzen 3000 die sizes is ~203 mm2. That IO die is NOT free.
It really isn't even a serious debate:
1: Intel is using less silicon in a size/process maturity where yield is NOT and issue.
2: Intel is using less expensive process for all of the silicon. AMD is using a more expensive process for ~40% of the package.
3: Intel it has simpler design with less manufacturing/testing complexity.
4: Intel captures all CPU revenues, AMD has to share with it's manufacturing partners: TSMC and GF.
Intel has a significant production cost advantage from every angle.
on that thread someone says it will not hit 5Ghz due to the I/O die but others reply it should not affect it, I'm thinking isn't it the other way around due to the I/O die heat will be more distributed under the heatsink hence leaving a little more margin to go higher in clocks.
The two die are on their own and only connected by IF. Clock limits on either one are unique and not affected by the other.on that thread someone says it will not hit 5Ghz due to the I/O die but others reply it should not affect it, I'm thinking isn't it the other way around due to the I/O die heat will be more distributed under the heatsink hence leaving a little more margin to go higher in clocks.
(The I/O die may maybe hold back performance gains by increasing the clock but that wasn't the question.)
yeah but I'm not talking about the IF I'm talking about the heat from the I/O die that will be further away from the cores than if it was a monolithic design and the other way around.The two die are on their own and only connected by IF. Clock limits on either one are unique and not affected by the other.
The heat density is less than high power GPUs. Take from that what you will. I don't see an issue.yeah but I'm not talking about the IF I'm talking about the heat from the I/O die that will be further away from the cores than if it was a monolithic design and the other way around.
yeah but I'm not talking about the IF I'm talking about the heat from the I/O die that will be further away from the cores than if it was a monolithic design and the other way around.
Ryzen 3000 desktop part production costs will undoubtedly be more than Intels parts, and almost certainly more than Ryzen 2000 parts.
Anand estimates 9900K die to be ~177 mm2. This is NOT a large die. Not large enough that breaking into smaller pieces would significantly improve yield.
Anands estimate for combined Ryzen 3000 die sizes is ~203 mm2. That IO die is NOT free.
It really isn't even a serious debate:
1: Intel is using less silicon in a size/process maturity where yield is NOT and issue.
2: Intel is using less expensive process for all of the silicon. AMD is using a more expensive process for ~40% of the package.
3: Intel it has simpler design with less manufacturing/testing complexity.
4: Intel captures all CPU revenues, AMD has to share with it's manufacturing partners: TSMC and GF.
Intel has a significant production cost advantage from every angle.
Intel really does not when you look at their entire CPU product stacks.
Sure 8c vs 8c might mean a monolithic die has a small cost advantage on the surface but that does not account for
1) Harvesting. The 9900K die is used in the 9900K and 9700K. I do not think it is used anywhere else. The 8c Chiplet is used in every CPU product AMD will be selling (apart from APUs). The Desktop IO die is going to be used in every single desktop CPU they make. Sure a 125mm^2 die might be a bit large for use in a $99 product if that was the only place it was being used but a 125mm^2 die that is being made on a cheap node and can be used in all desktop CPU products is a different matter.
2) Binning. Not all fully working 9900K dies will be used because even though it is fully working it may not bin at the 9900K or 9700K speeds within their TDP range. This is waste product that goes unsold (unless there is another product that I am missing I know the 9600K has its own die). For AMD a fully working 8c die that does not bin in the server segment could be used in TR, or it could be used in a 16c part, or it could be used in an 8c part. If it does not bin in any of them you can go back to 1, cut some cores and try it again in the 6c bins.
3) Core Scaling. At 8c I bet production is a bit of a wash. Monolithic is cheaper in some ways but being able to used harvested or binned dies for AMD can offset that. For lower core parts I can see Intel coming in ahead on pure manufacturing costs but the R&D to develop those dies might outweigh the increased manufacturing costs for AMD. Once you go above 8c though it swings to AMD regardless and when you hit TR and server based parts I do not see how Intel can compete. The closest Intel can get to 64c EPYC (~1000mm^2) is if they were to sell a fully enabled 28c part in MCM. That gives Intel a 56c part (~1400mm^2) and their ability to make use of 28c dies that are partially broken or do not fit into a bin is far more limited than AMDs ability to re-use 8c chiplets.
The above means that practically every working (even partially) chiplet that AMD manufacturer can be sold which greatly reduces average cost per chip. The other advantage is that if AMD want to make more of an in demand product they can just divert chiplets from lower demand products and use them in the product that has demand (even more true once yields improve and AMD has to artificially harvest good dies). Intel has a much tougher time reacting to the market because they need to change their production plan rather than just changing what gets used where which is far more expensive and a far longer process.
As 7nm yields improve this advantage swings even more towards AMD as they will get even more usable chips from a wafer.
I covered 4 major (unrefuted) points why Intel 8 core desktop parts have much lower production costs, and you counter with an argument that Intel doesn't or can't bin/harvest, though you pointlessly dragged out what could have been stated in a sentence.
Your augment is completely moot for 2 reasons.
1: "harvesting" is only significant when yields are bad. If yields are >90%, which they almost certainly are for Intels ultra mature 14nm process. Then all you get from harvesting dies with failed parts is the possibility of recovering something less than 10% additional of Low End dies, this has negligible effect on the overall production cost/die(at least compared to the four advantages Intel has). You might save up to 10% of extra dies, but they are only low end, low profit dies, and in reality it would be much less than that.
2: Intel is already "harvesting", or selling 8 core dies, with less than 8 cores enabled. The 9600K 6 core part is using the 8 core die. der8auer delidded a 9600K and it was the same size as the 9900K, and the 9600K while unlocked is spec'd for lower clock speed, so Intel could speed bin here as well.
I covered 4 major (unrefuted) points why Intel 8 core desktop parts have much lower production costs, and you counter with an argument that Intel doesn't or can't bin/harvest, though you pointlessly dragged out what could have been stated in a sentence.
As far as your points go
1) Not true, the IO die is smaller than the 9900K die and is on a process that is mature and very high yielding so AMD can get more usable dies per wafer than Intel. As for the 7nm chiplet there is little information on 7nm yields at the moment so trying to compare yields and working dies is impossible so anything comparing these is a guess. You assume 7nm has low yields but you do not know that.
2) AMD can manufacturer more than 2x as many 8c dies per wafer as Intel can so even if the wafer costs 2x more the cost per 8c die is the around the same. Thanks to harvesting / binning AMD will also likely have much lower waste compared to Intel.
3) The Intel SoC design is not simpler than the 8c Chiplet design. The package design might be but I do not see it as much more complicated than old CPU + NB systems. AMD have just moved the NB onto the same package as the CPU, the building blocks are the same. I would argue that since AMD only have to test 3 different designs it might even be easier than Intel who have much larger variety of dies to test.
4) Intel also has higher expenses to service those manufacturing facilities and these need to be paid for even when they are not being fully used or when they are being re-fitted. AMD just pays per wafer.
As for your refutations.
1) Harvesting on small dies is less important with high yield as you say. Scale that up to a 700mm^2 CPU though and it becomes far more important because yields tank. AMD will not have that problem with their design.
2) I never said Intel do not bin / harvest. I said they have less opportunity to do so because they have a larger variety of designs.
You cannot see the forest for trees though.
AMD are going to be amortizing their 8 core chiplet across their entire graphic-less product stack (including high margin servers) and the 2ch I/O die across their entire desktop range.
Intel are amortizing their 8 core LCC across only the client sector which uses that die (I *think* most of mainstream client will use that LCC die?) but the higher margin HEDT won't.
Now - perhaps due to Intel's volumes relative to AMD, that isn't so bad in absolute numbers - but for AMD following Intel's approach simply wouldn't work.
I am not assuming anything.
Fact 1: 7nm wafers cost more than 14nm.
Fact 2: AMD is using more total silicon 60% 14nm, 40% 7nm.
Even if both AMDs dies were on 14nm, it would still be more expensive than Intels smaller (less total area) 14nm part.
Irrelevant. AMD is using more silicon overall. So their total of 14nm + 7nm wafers, is greater than Intels use of 14nm wafers. You can't keep ignore the IO die when you want to pretend AMD gets more parts/wafer.
Intel actually gets more parts per wafer. 203/177 = 15% more parts/wafer.
In production, a 1 die product is simpler than a 2 die product. It's a fact.
Completely swamped by the fact that TSMC makes between 30% and 50% profit margin on every wafer (while covering those costs) it sells and Intel captures it all. In effect AMD pays those same costs + 30% plus margin to TSMC.
For both of these, we are not talking about other designs, we are talking about the 8 core desktop parts. I will totally agree that the advantage swings in favor of AMD on Epyc and perhaps on TR.
But for the 8 core desktop parts under discussion, Intel has a number of cost advantages, some of them large.
Do they get 15% more usable parts / wafer? That is the real question and without yields we do not know the answer. AMDs flexibility with chiplets also means a chip that does not bin in x can be used in y or can be harvested for z leading to far more usable parts / wafer.
I know you are masterful at splitting hairs to advance arguments, but cost of a die is not only production costs. Your stressing only this makes me think that you fully well know this but conveniently ignore anything else. The myriad advantages of a multi-die approach assembled from as few as possible distinct blocks go way, way beyond direct fab silicon costs. Several of us have listed them many times. If you really can't understand this, I'm now stumped.AMD is using 15% more silicon at the beginning.
14nm yields at this point are almost certainly >90%.
Meaning, even if Intel didn't do any salvaging, and was forced to throw away a full 10%, and AMD managed to slavage 100% of dies, AMD would still be using more silicon because 15% > 10%.
On top of that, it was already pointed out that Intel does offer core reduced parts, making that part of the argument totally moot.
Intel is fully on a more mature process and it also offers core reduced parts, so in reality that 15% area advantage is likely maintained.
So in reality AMDs cost disadvantage is something like this:
15%+ penalty for using more silicon wafer area.
5%+ increased wafer costs for 40% of the chip on more expensive if 7nm wafer. This is unknown, but it is certainly larger than 5%
(small amount for increased packaging, ignore).
30%+ penalty for TSMC/GF profit margins.
That is a ~50%+ production cost penalty that AMD deals with in producing Ryzen 3000 8 core vs Intel 8 core.
I am not assuming anything.
Fact 1: 7nm wafers cost more than 14nm.
Fact 2: AMD is using more total silicon 60% 14nm, 40% 7nm.
Even if both AMDs dies were on 14nm, it would still be more expensive than Intels smaller (less total area) 14nm part.
Completely swamped by the fact that TSMC makes between 30% and 50% profit margin on every wafer (while covering those costs) it sells and Intel captures it all. In effect AMD pays those same costs + 30% plus margin to TSMC.
For both of these, we are not talking about other designs, we are talking about the 8 core desktop parts. I will totally agree that the advantage swings in favor of AMD on Epyc and perhaps on TR.
But for the 8 core desktop parts under discussion, Intel has a number of cost advantages, some of them large.
AMD is using 15% more silicon at the beginning.
But Peter, is it the cost of materials that is relevant or the cost of producing the actual dies? Those are two different things.
If the material costs per wafer are close to the same and the primary cost increase has to do with the node size and design complexity / process then the point is essentially possibly moot.
Good analysis.Design complexity I think is something that people are missing on the IO die. It contains no complex CPU cores. We don't know what all it has but its a lot smaller then SR and PR. Something that right out of the gate they were getting 80-83% fully functional dies. It's going to be a lot less clock sensitive and who knows what kind of redundancy is built in. They could have 3-4 Memory channels. 32+ PCIE lanes and so on, that way if their are defects the dies can still be used and much like the chiplets pushing them to near 99% usable. Till we know whats inside we won't know. But now they have a much cheaper to design, on a much cheaper wafer, with no worries about performance binning, that is highly resistant to a bad chip. We were projecting AMD at something like $35 a SR chip as R3 launched. Its possible this design can push them even closer to a low $20 or high teens cost for that die. A die that frankly a wash to AMD anyways because they would be charged for them whether or not ordered them.
Intel has a bigger issue at hand though. Really a perfect storm of three. Ignoring that Intel in the best of worlds is probably looking at SR like (and probably a little less) yield and die cost for Intel on the 9900k. The real issue is that the 9900k is larger than the 8700k and the 7700k before it. It's why Intel increased the cost but not the only reason. Second is the maxed out 14nm production. They are selling every server CPU they can make specially at the XCC size. The larger the consumer die and its smaller margins they sell the less Server and specifically the XCC wafers they can produce. That's another reason Intel increased the product cost to eek out back some of the margin they are losing by dedicating production to making it available. Then comes the real margin killer Cascade Lake. Now all of sudden server CPU production is basically cut in half. With pretty much the whole production line requiring twice the dies. If they weren't strapped in production this wouldn't matter but Intel has been maxed out even before it's release. Even then they can't just make the 48c (still under AMD's max with Zen 2) cost twice what their 28c dies do now. It would have been a hard sell at $20k without AMD. It's going to be that much harder with AMD touting a 64c chip. So now server margins in the best case are cut in half, as larger core count consumer chips also require more wafers for same supply.
This is why we can't consider AMD on a 1:1 with Intel. Intel can't make the 10900k or whatever they call it more enticing. They can't actually fight AMD on prices on the consumer end. AMD just has to slide dies in packaging toward one product range or another. Consumers selling out more Ryzen, Demand skyrockets on Epyc, slide more over that way. They have a long long long way to go before they have to worry about wafer allotments and constrained production. All while using the same uber small chiplets the can be havested and binned across their whole product lines and IO dies they had to buy anyways that can probably have enough redundancy and much lower to non-existant performance binning to further drive down cost. Whatever AMD makes it costs them whatever the wafers costs them. Intel is much more dependent on what they are making with those wafers.
Good analysis.
To be somewhat facetious, this raises their overheads even more, as the increased army of analysts constantly searching for the right mix raises the wage bill.