Speculation: Ryzen 3000 series

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Timorous

Golden Member
Oct 27, 2008
1,727
3,152
136
Is it fair that Intel gets a 0.05 defect rate whilst AMD for no stated reason gets 0.5?

Nope, not fair at all but it does set a worst case baseline in terms of 8c dies per wafer.

EDIT: I should have said yield as TSMC use 300mm wafers (thanks Mopetar for the correction in the pricing thread). The numbers I used were comparing 450mm wafers across the board. I have no clue what wafer size Intel are using. I know they were talking about 450mm but no clue if they actually use them at the moment.
 
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Gideon

Golden Member
Nov 27, 2007
1,714
3,938
136
Nope, not fair at all but it does set a worst case baseline in terms of 8c dies per wafer.

EDIT: I should have said yield as TSMC use 300mm wafers (thanks Mopetar for the correction in the pricing thread). The numbers I used were comparing 450mm wafers across the board. I have no clue what wafer size Intel are using. I know they were talking about 450mm but no clue if they actually use them at the moment.

At least initially they used 300mm. I doubt they just silently changed it in the middle of the road, though the process is "450mm ready".

The industry has evolved considerably since when 450mm seemd desirable. According to Malcolm Penn the industry seems to have no desire for 450mm for now.
 

moinmoin

Diamond Member
Jun 1, 2017
4,994
7,765
136
I think in AMD's case the technical yield rate/defect density is fairly negligible and as such overrated since that's an aspect the chip design and product range can be optimized for. Zen/Zen+ already had built in a lot of opportunities to salvage otherwise defect chips. With the Zen 2 chiplets on 7nm they also cut out plenty of the uncore, the one area where defects are the hardest to salvage.

For AMD the primary cost issue very likely is not the cost of wafers, but the up-front cost for chip design and masks, while ensuring its amortization over time. Only once this up-front cost is fully amortized the per wafer cost (and respective yield rate/defect density) become a bigger deal.



This (aside IO not profiting as much from scaling) explains why the far bigger IOC stays on an older process node. This also explains why AMD has only one CPU chiplet design on 7nm. It further explains why it always made sense for desktop to also use IOC and chiplets, the overall increasing chiplet quantity helps amortizing the ever increasing up-front cost sooner than later. And AMD will need a high speed for amortization considering they plan to move to another new process node in 7nm+ for Zen 3 targeted for 2020, so the up-front cost won't decrease there either.
 

Mopetar

Diamond Member
Jan 31, 2011
8,015
6,464
136
EDIT: I should have said yield as TSMC use 300mm wafers (thanks Mopetar for the correction in the pricing thread). The numbers I used were comparing 450mm wafers across the board. I have no clue what wafer size Intel are using. I know they were talking about 450mm but no clue if they actually use them at the moment.

All of the major fabs are using 300mm wafers and have been for quite some time now. 450mm might eventually happen, but it would require extensive retooling and changes into planning for how fabs are built.

If you're just making comparisons in terms of yield, it doesn't matter which wafer size you use, since the yield rate is essentially the same regardless. If you've got a wafer that fits twice as many dies, you still end up with the same percentage of defective parts.
 

Paratus

Lifer
Jun 4, 2004
16,846
13,778
146
So GN has a quick update on Ryzen 3000. They said their source confirmed 12 and 16 core parts will be coming. This supports the conclusions AT drew and some of the rumors AdoredTV was promoting.

 

PeterScott

Platinum Member
Jul 7, 2017
2,605
1,540
136
So GN has a quick update on Ryzen 3000. They said their source confirmed 12 and 16 core parts will be coming. This supports the conclusions AT drew and some of the rumors AdoredTV was promoting.

We already have confirmation from Lisa Su (doesn't get much better than that), that they will be using the extra space to add more cores. Really the only sensible option are 12 and 16 cores, when you go beyond 8.

 

amd6502

Senior member
Apr 21, 2017
971
360
136
We already have confirmation from Lisa Su (doesn't get much better than that), that they will be using the extra space to add more cores. Really the only sensible option are 12 and 16 cores, when you go beyond 8.

In my opinion 4+4 die salvage is another good reason. Although if it does not happen too frequently, these would be better off in single chiplet Ryzen 3's.

Can anyone estimate how frequently one might get dies with only 4 salvagable cores? (one CCX shot, or both CCX's having defects but with two and two+ salvagable cores per CCX)
 

maddie

Diamond Member
Jul 18, 2010
4,787
4,771
136
My prediction is that the fastest, as in MHz, Ryzen 8C and maybe across all models will have 4+4 chiplets.
 

Mockingbird

Senior member
Feb 12, 2017
733
741
106
Mockingbird does not understand what the video is about or who made it,.

You are mistaken.

I have read quite a few reviews from GamersNexus on the past couple of years.

I consider GamersNexus to be a respectable source.
 
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Reactions: PeterScott

Markfw

Moderator Emeritus, Elite Member
May 16, 2002
25,752
14,783
136
Mockingbird was calling AdoredTV, FakeTV because Paratus mentioned Adored in his post about the GN video, that's all.

The dead horse has been sufficiently beaten, can we please bury the poor thing and move on.
I didn;t start this. So Adored TV said the same thing as Gamers Nexus, which Mockingbird said was a good site, but he still called it "Fake TV". I am sick of the whole situation myself, I wish Mockingbird didn;t troll us, and I would not have to point this out.
 

H T C

Senior member
Nov 7, 2018
566
407
136
So it seems i misunderstood then: i thought it was GN that was being referred to as FakeTV, which i found surprising, tbh.

Apologies for the confusion.
 

beginner99

Diamond Member
Jun 2, 2009
5,223
1,598
136
My prediction is that the fastest, as in MHz, Ryzen 8C and maybe across all models will have 4+4 chiplets.

I mean epyc and TR will not only come with full configurations so broken dies also have their place in these 2 products theoretically like a 48 core product with 8x6-core chiplets. Albeit maybe they will just go with 6 full chiplets if that is technically possible.
 
Reactions: esquared

maddie

Diamond Member
Jul 18, 2010
4,787
4,771
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I mean epyc and TR will not only come with full configurations so broken dies also have their place in these 2 products theoretically like a 48 core product with 8x6-core chiplets. Albeit maybe they will just go with 6 full chiplets if that is technically possible.
I know, but I just was adding my thinking on a further use of cut chiplets. We'll see.
 
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