Speculation: Ryzen 3000 series

[ub4ty]

You can see the imprint for the 2nd compute die when she tilts it at a certain angle


Intel on suicide watch.. all that wasted hot air about 9900k. Non-production clocked chip beating it w/ 50Watts less power utilization in Cinebench... and it's coming w/ PCIE 4.0


Setting the standard and pushing the envelope yet again

 

[PingSpike]

I assume based on the limited information there was no mention what speed the chipset ports will run at? Not PCI-e 2.0 still, seems like moving them to 3.0 at least would be the obvious move.

 

[moinmoin]

I assume based on the limited information there was no mention what speed the chipset ports will run at? Not PCI-e 2.0 still, seems like moving them to 3.0 at least would be the obvious move.

New chipsets may support more (pretty sure older ones definitely won't), but that's for AMD to announce later. This was just a juicy preview confirming Ryzen is closer to Epyc than many expected (same chiplet which means wider and bigger caches than previous Ryzen gens).

 

[coercitiv]

When did he literally lie?

I don't believe Jim lied, but he did get played.

For reference, his source told him there is no other I/O die being produced. It fed him clocks ranges that are now clearly targets at best, and most importantly convinced him there would be a 16C/32T product on the CES show floor today.

 

[StinkyPinky]

Looks like a few tech youtubers have egg on their face.

Mid 2019...hoping that means April.

 

[scannall]

Looks like a few tech youtubers have egg on their face.

Mid 2019...hoping that means April.

Probably June, though April would be great.

 

[JTaylor2005]

Haven't we all just witnessed though, an AMD beating an Intel at single core performance, at less power, on a prototype chip, and with the option them possibly throwing another chiplet onto the same CPU and putting a 16 core 32 threader in the market?

 

[Glo.]

So, Navi and Zen2 hard launch on Computex 2019?

 

[ub4ty]

I don't believe Jim lied, but he did get played.

For reference, his source told him there is no other I/O die being produced. It fed him clocks ranges that are now clearly targets at best, and most importantly convinced him there would be a 16C/32T product on the CES show floor today.

Clicks = revenue. Unless there are official product releases for review, a lot of these groups have nothing to attract people to their content... Thus comes the shenanigans in between and why I ignore rumors. Absolutely none of them were accurate and there's no value in swooning over them.

 

[ub4ty]

Haven't we all just witnessed though, an AMD beating an Intel at single core performance, at less power, on a prototype chip, and with the option them possibly throwing another chiplet onto the same CPU and putting a 16 core 32 threader in the market?

We have. This was no doubt the low hanging fruit that would easily have been achieved. Thus why it was silly and absurd to keep ranting about the 9900k. I am laughing a little bit to anyone who ran out and bought that overpriced foolishness. Oh and the Ryzen chip will support PCIE 4.0.... Obsoleted in the blink of an eye.

 

[moinmoin]

With the confirmation that the IOC on Ryzen is not a quarter of Epyc's IOC the distinct die designs count for the Zen 2 gen now stands at 3. Will be interesting to see how AMD goes about APUs, whether there will be a chiplet + GPU MCM (and if so, whether they still create a smaller monolith APU) and how soon we will see the foreshadowed two chiplets Ryzen.

 

[StinkyPinky]

To be fair, the 9900k is older. It's not like they released at the same time.

Still, the fact that AMD can match it in IPC now bodes very well for the second half of 2019.

 

[mattiasnyc]

Clicks = revenue. Unless there are official product releases for review, a lot of these groups have nothing to attract people to their content... Thus comes the shenanigans in between and why I ignore rumors. Absolutely none of them were accurate and there's no value in swooning over them.

It's not about trusting their every word and taking it for gospel, it's about saying that someone is a straight-up liar without show just how and where they lied.

Those two are a bit different.

 

[moinmoin]

To be fair, the 9900k is older.

It's quite interesting how quickly the perspective can change. For some time 9900k looked like a great ending point for Intel's 14nm node, now it looks like any CPU superseded by a decidedly more advanced node. By now it should be very clear that Intel can't stay any longer on 14nm, however much optimized, without looking bad in comparison.

 

[trollspotter]

Is there any reason why they wouldn't market this 8 core as the 3600X? Leaves room for 10/12 core at 3700x and more later on.

 

[Spartak]

My first guess would be this cinebench is running around 4.1-4.3 GHz on all cores.

If we assume the IO consumes around 15W the 8core chiplet runs around 60W or about 7.5W per core.

This _again_ leaves me wondering why they didnt go for 6 core chiplets. 12 cores would give you 90W for the chiplet and 105W total, which is identitical to the current 2700X TDP.
For an extreme edition 125W you could up the all core frequency a bit like she suggested there is room for right now.

If they remain at 8 core tops, and they squeeze another 10% frequency out of it (~4.7GHz), you use that same +40% power budget but instead of 50% extra performance you get 10% extra performance.

OTOH if you put a double chiplet inside this, you either blow your power budget (~135W at these frequencies) or your highest end CPU's need to be significantly clocked down in all core turbo mode. Which on the desktop is quite unusual and would be a expensive waste of die-space. The 3850X as leaked would fit that power envelope with these frequencies though, but leaves all core performance on the table for all but the most exotic systems.

This cinebench demo AGAIN shows 12 core to be the sweet spot for desktop. I cannot see them stay at 8 cores UNLESS this core was clocked significantly low (~4GHz range) and final frequencies will be considerably higher.

 

[exquisitechar]

I don't believe Jim lied, but he did get played.

For reference, his source told him there is no other I/O die being produced. It fed him clocks ranges that are now clearly targets at best, and most importantly convinced him there would be a 16C/32T product on the CES show floor today.

Well, apparently three leakers told him they didn't know of another IO die, but he still didn't completely disregard the possibility. He also says that his leaker used the word "reveal", not announce for Ryzen 3000 during ES, and that was him messing up. Still, no signs of Navi...

 

[moinmoin]

Is there any reason why they wouldn't market this 8 core as the 3600X? Leaves room for 10/12 core at 3700x and more later on.

They probably reserve that for the Zen 3 gen Ryzen (or a consumer only Zen 2+ if Zen 3 takes too long). This way they can keep increasing the core count on x800 more gradually. Like 8c 1800, no core increase in 2nd gen so no 2800, 12c 3800 and 16c 4800 or something along that line. Or they just don't use x800 anymore and x700 is to remain the top end of Ryzen.

 

[rbk123]

Q2/Q3 launch gives Intel plenty of time to come up with a tweak to their offerings. Plenty.
The lack of clock speed detail tells me it's not as great as the rumors were saying.

 

[exquisitechar]

Q2/Q3 launch gives Intel plenty of time to come up with a tweak to their offerings. Plenty.

Huh? No, it doesn't. They can't do anything in such a short time except maybe launch that 10 core on 14nm later this year. 10nm desktop is 2020.

Clock speed doesn't matter, they're just not revealing it months before launch. The performance is there, and that's with a ES that's sipping power. There will be a higher clocked 8 core.

 

[beginner99]

So, Navi and Zen2 hard launch on Computex 2019?

Ryzen3 maybe but Navi is earliest end of 2019 probably 2020. Else the Radeon VII wouldn't make that much sense.

 

[Topweasel]

Q2/Q3 launch gives Intel plenty of time to come up with a tweak to their offerings. Plenty.
The lack of clock speed detail tells me it's not as great as the rumors were saying.

No it doesn't. Intel doesn't have the flexibility in design or architecture that AMD has here. That gap on the bottom right means AMD can do stuff no quite on the fly, but within months of a decision. Intel has a die that they designed years ago and the only thing they can do is tune it for speed or power efficiency. Outside that they made their decision in 2015 or early 2016 at the latest. Now it could be that Intel planned well ahead and it's a 10c 5GHz chip, but that has very little to do with this presentation.

 

[Karnak]

Ryzen3 maybe but Navi is earliest end of 2019 probably 2020. Else the Radeon VII wouldn't make that much sense.

Why not if Navi will be at max a 2060/Vega64 performance-wise? Or if it's just a midrange-GPU like Polaris?

And Lisa said there will be more 7nm GPUs this year, so...

For Ryzen3000 I'm pretty sure we'll see a 16C. And Launch @Computex.

 

[Tuna-Fish]

This _again_ leaves me wondering why they didnt go for 6 core chiplets.

If the various different sandra leaks are right, the size of a CCX is still 4C, so they cannot really make a 6C chiplet.

Also, there will probably be quite a lot of chiplets with one faulty core. Assuming they still have the "all CCX must have same amount of cores active" rule, that means they get plenty of 6C chiplets to build the 12C chips that fit into the TDP.

 

[HurleyBird]

I think that, while it's not a home run, the event actually bolstered Adored's cred more than it hurt it.

A 16 core SKU is obviously planned. It's not just that there's space for another chiplet, but you can actually see the physical imprint in the substrate when Lisa is waving the chip around. It's not a compression artifact, and even though it's visible in a still it's undeniably obvious in motion.

And if Ryzen 3 is launching about mid year, it would be foolish to demo >8C parts this early or demand for current parts would drop off a cliff, especially for enthusiasts.

And that whole confusion about Ryzen 3 using chiplets but no IO die that one source forwarded to AdoredTV? It's entirely possible that a source might have seen the 1+1 configuration shown off at CES and mistakenly interpreted that as "large die with cores + IO combined with smaller die with only cores."

How about the 5 GHz 16 core stuff everyone was so in doubt about? Well, the 8c part was likely running somewhere close to that frequency (or at least in the high 4 GHz range), probably with a bit of extra voltage to assure stability in a demo setting, and was only drawing about 75W at full load by AT's rough estimate. Add six months development time, binning, and a well set up turbo implementation and that seems easily doable now. Yesterday it looked closer to wishful thinking.