Afaik there is no generic logic yet to differentiate between low and high utilization threads per se
Supposedly EAS can do this already:
https://developer.arm.com/tools-and...software/linux-kernel/energy-aware-scheduling
Exactly. And with Zen 2 already being as wide as Power 7 support for SMT4 in Zen 3 can be a valid logical conclusion as well.
Um, not really? I think the chance of AMD copying anything meaningful from the POWER family to be next-to-zero. They'll probably continue to mimic Intel's best design decisions while tossing aside their worst ones.
My primary point was supply begets demand, not the other way around. Now that AVX2 is more readily available it will be supported more. At the beginning new hardware features are picked up by high specialized software (like video encoders are for SIMD extensions) before developers figure out general uses.
Yeah, but look at AVX512. How many developers are going to pick up that SIMD ISA? I would say, far fewer than have embraced AVX2. See
@NTMBK's post below. How many developers are really going to want to embrace SMT4? Remember, if AMD does go SMT4, today's 8c buyers are going to be sold 4c or 6c products tomorrow. Most likely.
Your point about 8c/32t moving you into a different price bracket/power envelope confuses me a little. In all the years HT never really made a difference in the power envelope, it was simply a stagnant premium feature for Intel.
Of course it has made a difference. It's a price differentiator between the 9700k and 9900k today, just as it's been a feature/price differentiator at the low-end of Intel's stack as well (2c/4t i3s versus 2c/2t Pentiums, for example). Also see i5-6600k vs i7-6700k and others. Sure, there's binning and cache differences as well, but HT was a premium far far back in Intel's product stack. Even AMD differentiated between products as SMT on or SMT off with Summit Ridge. Look at the R3 product lineup. AMD is cost-conscious, and if they can sell a 4c/16t CPU in the price slot as their 8c/16t chips from today, then they will. Not sure where the TDPs would fall, mind you.
Here you are sticking to the HPC scenario
It's a best-case for SMT4, so why not?
whereas our initial discussion up to now was focused on big.LITTLE versus SMT4.
If DynamIQ wants to be taken seriously in the server room, it has to be useful in any possible scenario. And again, I think high-utilization database applications also fall outside of the HPC world. There are some times when a database is going to be running all cores well above 50%. Also CPU render clusters and other things.
That's a very limited time window to discuss about. 2 years. 3 gens, of which one is a refresh. My definition of "more of the same" would be HT and it being virtually unchanged since over a decade. I don't expect that to happen with AMD.
That's all we've got to go off of, though. Unless you think they'll go back to CMT or to a hybrid CMT/SMT solution. I think Sun/Oracle went that route. On second thought, let's hope AMD doesn't do that. In any case, AMD has no history of SMT4/8. Neither does Intel for that matter. I don't expect either one of them to try it considering how well IBM has done with advanced SMT implementation (which is to say, not very well at all; look at their market share).
Sure, why not? This is purely a matter of software and (VM) OS support. E.g. VMware's vSphere supports hot addition and removal of cores.
That's actually interesting, and makes the use case for DynamIQ SoCs in cloud environments somewhat compelling. But I'm veering off-topic a bit.
The whole point of the dedicated OS cores is to provide consistent performance. Having OS threads unpredictably stealing cache, branch slots and execution resources from your game threads is no help whatsoever.
They would be better off just putting a quad Jaguar cluster on die to handle the OS independently, or allocating a single Zen 2 core to the OS.
While I agree with you wholeheartedly in theory, in practice utilizing "little" cores might increase design costs. big.LITTLE/DynamIQ is also mostly unproven in the server room . . . for now. But what you're saying rings true.