Speculation: Ryzen 4000 series/Zen 3

[soresu]

AMD's Zen 4 is scheduled to (late?) 2022.

Not known yet, it's certainly likely to be later in H1 2022 though at the least - given how well TSMC seem to be executing on process and AMD on design I think it's more likely to be Intel's execution that guides the release date of Zen4.

 

[uzzi38]

AMD's Zen 4 is scheduled to (late?) 2022. It'd be pretty bad for Intel 10nm to start yielding in 2022, given they plan to release a 7nm-based client CPU in late '22/early '23.

No, early 22. Definitely H1.

Zen 4 is mean though. I'm very excited, because we should see very new tech hit mainstream markets. Really looking forwards to this.

ADL-S is Q3/Q4 21, so Intel will have a lead for half a year or so in 1T performance (ADL-P seems to be 2022 so unfortunately Tiger Lake will be forced to compete vs Cezanne for longer than I'd like). MT is still a lead for AMD. Seems like ADL-S is getting followed by Raptor Lake (ADL-S refresh?) and Meteor Lake (7nm but minimal architectural improvements?) over the course of 2022? That last bit is from MebiuW and co though, particularly on Raptor Lake, so I still would advise a word of caution.

Intel's roadmap is a mess >.>

EDIT: Oh, and Zen 3 and Rocket Lake should be very similar in per-Core perf.

 

[xilli_fiberbit]

I haven’t paid much attention to what Intel is doing sine it doesn’t seem relevant to my interest. With their process tech so delayed, they are going to have serious difficulty competing. I think Zen 3 is going to perform very well and probably be the top performer across the board on the desktop and Milan is going to extend their lead in almost everything for server/workstation/HPC. Intel may still have AVX512. I don’t think Intel will be able to compete by pushing the clock speed.

Intel has AMX now, we don't know if zen3 has the support AVX512 the AMX is just here for intel to try to keep an advantage

 

[uzzi38]

Intel has AMX now, we don't know if zen3 has the support AVX512 the AMX is just here for intel to try to keep an advantage

No AVX512 support, and certainly not AMX.

Genuine question though - what's the point of AMX over GPU acceleration?

 

[exquisitechar]

AMD's Zen 4 is scheduled to (late?) 2022. It'd be pretty bad for Intel 10nm to start yielding in 2022, given they plan to release a 7nm-based client CPU in late '22/early '23.

Why would Zen 4 be late 2022? N5 is going very well and there is no sign of AMD slipping up when it comes to their cadence.

No, early 22. Definitely H1.

Zen 4 is mean though. I'm very excited, because we should see very new tech hit mainstream markets. Really looking forwards to this.

ADL-S is Q3/Q4 21, so Intel will have a lead for half a year or so in 1T performance (ADL-P seems to be 2022 so unfortunately Tiger Lake will be forced to compete vs Cezanne for longer than I'd like). MT is still a lead for AMD. Seems like ADL-S is getting followed by Raptor Lake (ADL-S refresh?) and Meteor Lake (7nm but minimal architectural improvements?) over the course of 2022? That last bit is from MebiuW and co though, particularly on Raptor Lake, so I still would advise a word of caution.

Intel's roadmap is a mess >.>

EDIT: Oh, and Zen 3 and Rocket Lake should be very similar in per-Core perf.

ADL-P in 2022 sounds bad for Intel. It would be more favorable for them if ADL-S and ADL-P's release windows were reversed if what you say is true.

 

[yuri69]

The Zen 4 in 2022 stills looks like late '22 to me.

Let's recap the timeline:
* Q4 2020 - a few models of Vermeer leaks doesn't seem to cover the full lineup. So the rest waits for 2021.
* H1 2021 - the Vermeer line rollout finish; Genesis Peak TR
* late H2 2021 - start of Warhol Zen 3 refresh rollout (AM5); probably along with a few Genesis Peak TR models
* H1 2021 - ??? period when Warhol is still pretty young to be replaced
* H2 2022 - Zen 4-based Raphael

It fits the scheme of previous Zen product releases:
* Zen - Feb '17
* Zen+ - Apr '18 => 13 months since previous gen
* Zen 2 - Jul '19 => 15 months since previous gen
* Zen 3 - Oct(or later) '20 => 14 months since previous gen
----------------
* Zen 3 "Warhol" - 12+ months => Oct+ 21
* Zen 4 - 12+ months => Oct+ 22

So what exactly does make you think that Zen 4 is a H1 2022 product? Is "Warhol" scheduled to be a short-lived product just to spearhead AM5? Is AMD speeding up the release schedule?

 

[itsmydamnation]

The Zen 4 in 2022 stills looks like late '22 to me.

Let's recap the timeline:
* Q4 2020 - a few models of Vermeer leaks doesn't seem to cover the full lineup. So the rest waits for 2021.
* H1 2021 - the Vermeer line rollout finish; Genesis Peak TR
* late H2 2021 - start of Warhol Zen 3 refresh rollout (AM5); probably along with a few Genesis Peak TR models
* H1 2021 - ??? period when Warhol is still pretty young to be replaced
* H2 2022 - Zen 4-based Raphael

It fits the scheme of previous Zen product releases:
* Zen - Feb '17
* Zen+ - Apr '18 => 13 months since previous gen
* Zen 2 - Jul '19 => 15 months since previous gen
* Zen 3 - Oct(or later) '20 => 14 months since previous gen
----------------
* Zen 3 "Warhol" - 12+ months => Oct+ 21
* Zen 4 - 12+ months => Oct+ 22

So what exactly does make you think that Zen 4 is a H1 2022 product? Is "Warhol" scheduled to be a short-lived product just to spearhead AM5? Is AMD speeding up the release schedule?

I think Warhol is zen3 with am5 iod. Just how the excavator was the start of am4. There will probably be a lot of new iod technologies in am5, usb4, ddr5 pci 5. Nothing wrong with pipe cleaner part especially if you can re use the iod anyway. That exp Will also help for the server iod.

Unless you expect server and desktop road map to diverge and what is your reason for that?

 

[yuri69]

I think Warhol is zen3 with am5 iod. Just how the excavator was the start of am4. There will probably be a lot of new iod technologies in am5, usb4, ddr5 pci 5. Nothing wrong with pipe cleaner part especially if you can re use the iod anyway. That exp Will also help for the server iod.

Unless you expect server and desktop road map to diverge and what is your reason for that?

Yea, like I mentioned in the post you quoted - I fully expect the Warhol to be an AM5 based piepecleaner.

That one would feature "refreshed" Zen 3 CCDs - it might range from a simple 100MHz-ish clock boost or an upgraded firmware to a new silicon revision. The IOD would simply use DDR5 and other upgraded IPs.

But still, why would AMD bother with that if Zen 4 would be early 22? The product cycle would be halved or so.

As for the srevers, AMD seems to keep the server roadmap stable. There was no "Zen+" EPYC, so there probably won't be a Warhol-like EPYC. Besides, Milan doesn't seem to scheduled for 2020, am I right? If so, we would have an early 2021 Milan still on DDR4 and a late 2022 DDR5 Genoa.

 

[soresu]

There will probably be a lot of new iod technologies in am5, usb4, ddr5 pci 5.

That leaked* roadmap already states PCIe4 for Warhol.

I don't think we will see PCIe5 till 2022.

The PCIe4 with DDR5 in Rembrandt supports this prediction I think.

*yes I know it could be bogus.

I wonder if the D* APU on that roadmap could be Daubigny - I saw an exhibition of his work and it sounds like he inspired many impressionist painters like Van Gogh, would be a perfect codename if so. I know that 'Dragon Crest' has been floating about, but it seems like leaker bait if so given it has nothing to do with artists.

 

[leoneazzurro]

PCIE 5 is quite a problem for consumer space because of the higher signal requirements leading to a PCB cost increase. With the addition of starting to having uses* for PCIE 4 in the consumer space only now. In workstation/server space of course it's different.
* Still limited to some high performance NVME drives with limited benefits, and at max a single digit % (on the lower side) added performance for graphic cards

 

[moinmoin]

I don't think PCIe 5 is any problem in the consumer space at all. Rather it's an additional vector board manufacturers can use to segment their product by. I'd personally be fine with a board that gives only NVME full speed access and leaves the rest at past/current gen.

 

[leoneazzurro]

It's a problem of costs not reflecting actual real advantages in that space(for now). ATM only the newest NVME SSD drives may come near saturating a x4 PCIE 4 link (with very low actual advantage for the casual usage, I'd say), performance of graphic cards is largely unaffected passing from a x16 PCIE 3.0 to a x16 PCIE 4.0 link. And things like fibre channels or >2,5Gbit ethernet are still outside the scope of the consumer market. In a few years, yes, you may find practical uses of PCIE 5 in consumer space. Until then, it will be more a marketing number than a practical help. But, if you want the top mainboards, you will have to pay for those additional requirements if you use them or not. This is the same issue we see with the X570 mainboards, which were more expensive than X470. And we will see the bar raising again with the advent of PCI 5, while most people will not use those features until a few yeaars more. That is the "problem" I see.

 

[NostaSeronx]

Anyone worried about 12FDX IODs should hold off. After the two year late 22FDX+ announcement, 12FDX is to be four years late.
"Globalfoundries expects to be in production on 12FDX in 2023 or 2024."

Chiplets follow N-1 =>
7nm CCD = 12nm IOD <-- Bixby confirmed
5nm CCD = 6nm IOD <-- Durango confirmed
3nm CCD = 4nm IOD

 

[Mopetar]

Anyone worried about 12FDX IODs should hold off. After the two year late 22FDX+ announcement, 12FDX is to be four years late.
"Globalfoundries expects to be in production on 12FDX in 2023 or 2024."

When someone told GlobalFoundries that in order to be successful they needed to be more like Intel, I think they took it the wrong way.

 

[jamescox]

The power efficiency drop has a lot to do with distances - ie trips between the CCD's and the IOD.

Stacking the CCD's on the IOD as an active interposer with TSV's could lessen the efficiency impact somewhat - even more so if they could get around the thermal problems with stacking multiple CCD's on the IOD, but that would require some radical physical architectural changes to stacking (ala ICEcool) before they can eliminate the thermal problem at the transistor/wire level with more advanced process nodes causing less thermal dissipating electron leakage ala spintronics for logic and data transmission (or photonics/plasmonics for data).

Zen 4 Epyc Genoa is almost certainly going to be stacked die. TSMC has a large number of different die stacking options available now or coming out in the next year or two. I have already posted this several times, but there is a quick overview here:

3DFabric: The Home for TSMC’s 2.5D and 3D Stacking Roadmap

www.anandtech.com

I am thinking Genoa may use the SoIC die stacking to stack multiple cpu die and/or cache chips. The SoIC tech is die stacking without micro-bumps. It has better thermal conductivity than the other technologies using micro-bumps. For super high core count Genoa processors, we expect the clock speed to be lower anyway, so they can keep the power consumption down for stacking and staying within package power limits. The stacking will reduce package area significantly so core count could be huge. They really need to go to chip stacking for Zen 4. Doubling the bandwidth again using pci-e 5 style based links will consume too much power. The stacked and/or interposer links could easily be 1024-bits wide, much higher bandwidth than even pci-e 5 links, and a lot less power.

We have no idea what AMD is going to do in the desktop market for Zen 4 and/or some kind of Zen 3 based AM5 part. I am kind of thinking that we get monolithic 8-core Zen 3 APUs for AM5 in mid 2021. It is unclear how they would do an AM5 based “Warhol” with Zen 3. With Zen 4 chiplets probably being stacked, they may not be able to just use a Zen 4 IO die (possibly interposer or other stacked tech) with a Zen 3 BGA cpu die. We may actually see AMD switch to having different die for Epyc and Ryzen. They could relatively easily make a monolithic 16 core cpu at 5 nm. It would probably still be two CCX on one die if such a thing exists. TSMC has some stacking tech is much cheaper than a full interposer, so we can’t really rule out chip stacking across the full product stack.

Intel seems like they have talked a lot about upcoming technologies while AMD has been almost silent. This makes Intel appear to be in the weaker position, trying to keep people interested in their upcoming products even though they will not be out for quite some time. Intel could make a comeback with a 7 nm, stacked die cpu, but it doesn’t seem like it will be in time. TSMC seems like they are ahead in stacking technology in addition to the actual process tech, although both companies have been making some types of stacked packages for a while. I don’t know if Intel has anything to compete with the SoIC bumpless stacked die. TSMC has good reason to strongly support AMD since they can grab a chunk of the x86 enterprise market through AMD that would have been fabbed by Intel otherwise. TSMC can get a share of the server market through ARM, but who knows how that is going to go with the Nvidia purchase. A lot of companies do not like working with Nvidia. I could see Apple dumping ARM for an open architecture very quickly if they wanted to. It probably isn’t that hard to switch between more RISC-like architectures.

 

[jamescox]

Anyone worried about 12FDX IODs should hold off. After the two year late 22FDX+ announcement, 12FDX is to be four years late.
"Globalfoundries expects to be in production on 12FDX in 2023 or 2024."

Chiplets follow N-1 =>
7nm CCD = 12nm IOD <-- Bixby confirmed
5nm CCD = 6nm IOD <-- Durango confirmed
3nm CCD = 4nm IOD

I have no idea what AMD will still be able to produce at GF. They are almost certainly going to use TSMC chip stacking tech. It seems unlikely that they would be able to include die made at GF in the stack. GF may be making chipset type stuff and little else for Zen 4.

 

[LightningZ71]

I think that it's time for GloFo to just call it quits and sell their assets to TSMC or Samsung. Heck, the tech is already Samsung's any way.

 

[jamescox]

It's a problem of costs not reflecting actual real advantages in that space(for now). ATM only the newest NVME SSD drives may come near saturating a x4 PCIE 4 link (with very low actual advantage for the casual usage, I'd say), performance of graphic cards is largely unaffected passing from a x16 PCIE 3.0 to a x16 PCIE 4.0 link. And things like fibre channels or >2,5Gbit ethernet are still outside the scope of the consumer market. In a few years, yes, you may find practical uses of PCIE 5 in consumer space. Until then, it will be more a marketing number than a practical help. But, if you want the top mainboards, you will have to pay for those additional requirements if you use them or not. This is the same issue we see with the X570 mainboards, which were more expensive than X470. And we will see the bar raising again with the advent of PCI 5, while most people will not use those features until a few yeaars more. That is the "problem" I see.

There is no reason to have pci-e 5 on desktop parts. I don’t really think we are going to see it until Zen 4, at least, even if we get some version of AM5 based Zen 3. The extra power consumption, board cost, and possibly trace length limits are not worth it for a desktop level platform. You can get ridiculous speed storage now by RAIDs of NVME pcie SSDS.

 

[Hitman928]

I think that it's time for GloFo to just call it quits and sell their assets to TSMC or Samsung. Heck, the tech is already Samsung's any way.

They called it quits on continuing down the leading node path but still have a lot of business on older nodes as far back as 180 nm. Additionally, 22FDX is gaining some momentum for mixed signal / automotive / RF applications which could sustain them many more years (with an upgrade path to 12FDX at some point).

 

[jamescox]

The Zen 4 in 2022 stills looks like late '22 to me.

Let's recap the timeline:
* Q4 2020 - a few models of Vermeer leaks doesn't seem to cover the full lineup. So the rest waits for 2021.
* H1 2021 - the Vermeer line rollout finish; Genesis Peak TR
* late H2 2021 - start of Warhol Zen 3 refresh rollout (AM5); probably along with a few Genesis Peak TR models
* H1 2021 - ??? period when Warhol is still pretty young to be replaced
* H2 2022 - Zen 4-based Raphael

It fits the scheme of previous Zen product releases:
* Zen - Feb '17
* Zen+ - Apr '18 => 13 months since previous gen
* Zen 2 - Jul '19 => 15 months since previous gen
* Zen 3 - Oct(or later) '20 => 14 months since previous gen
----------------
* Zen 3 "Warhol" - 12+ months => Oct+ 21
* Zen 4 - 12+ months => Oct+ 22

So what exactly does make you think that Zen 4 is a H1 2022 product? Is "Warhol" scheduled to be a short-lived product just to spearhead AM5? Is AMD speeding up the release schedule?

I am pretty sure that they are still saying 2020 for Milan. There is a good chance that it uses the same IO die as Rome, so once the cpu die are available they should be able to launch Milan quickly. It will go through increased validation compared to Zen 3 desktop parts, but with Zen 3 desktop parts launching next week, I don’t see why Milan would not follow soon. Using the same IO die in the same socket should save a lot of work and time compared to a completely new platform.

 

[jamescox]

They called it quits on continuing down the leading node path but still have a lot of business on older nodes as far back as 180 nm. Additionally, 22FDX is gaining some momentum for mixed signal / automotive / RF applications which could sustain them many more years (with an upgrade path to 12FDX at some point).

Not everything needs to be on a leading edge node. The micro-controller in my dishwasher doesn’t need to be on 5 nm.

 

[Hitman928]

Not everything needs to be on a leading edge node. The micro-controller in my dishwasher doesn’t need to be on 5 nm.

You mean you haven't installed custom firmware on your dishwasher to overclock the microcontroller and get your dishes clean 20% faster? What are you waiting for?

 

[Thunder 57]

Not everything needs to be on a leading edge node. The micro-controller in my dishwasher doesn’t need to be on 5 nm.

Even if was made by the same idiots that created Juicero or smart toaster ovens?

 

[jamescox]

Even if was made by the same idiots that created Juicero or smart toaster ovens?

Well, it only has a couple red LED lights (no RGB), which seem to be only on and off, so it is kind of display limited. If they could get my dishes cleaned better and more quietly, then I guess put a 5 nm chip in there.

 

[LightningZ71]

There is absolutely an industry need for products that can be made on older, more mature foundry nodes. That much is certain. Unfortunately, the revenue from those products is orders of magnitude less than leading edge nodes as we just saw from the TSMC wafer cost leaks. Eventually, your inexpensive old nodes are no longer in demand and your revenue, which has been far from what it needed to be to keep up with the rising cost of new node research, has sunk to such a low level that you can't even afford the maintenance on your existing lithography equipment.

GloFo, by choosing to cease development work on their leading edge node processes, has essentially written their epitaph, just years ahead of when their demise finally happens.