Speculation: Ryzen 4000 series/Zen 3

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randomhero

Member
Apr 28, 2020
184
251
136
This is some serious news / rumour.

If true, only ryzen cpu that could be done early is mobile.
Products in late Q2? Around Computex?
Zen4 late Q3/early Q4? 12 months later than Zen3?

Whatever the CPU is, this is beyond big if rumour is true.

Wow😱
 

AtenRa

Lifer
Feb 2, 2009
14,003
3,361
136
Well this road map goes very well with the latest 5nm rumor.

We could have a CES 2021 release of ZEN 3 with availability in February/March 2021.


 
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Ajay

Lifer
Jan 8, 2001
16,094
8,104
136
Also as @Andrei. mentions, this makes little sense for servers. After all Milan has been sampling for a while. since late last year if some rumors are accurate, no-way that was 5nm:


Such a change so late would be a very big no-no for server vendors (as this means new lengthy validations, etc and might slip schedules). So this would mean that (at least the initial) Milan Server parts would still need to be improved 7nm.

Yet considering that server would be the platform that would benefit the most from 5nm+ (and one of the easiest to cover expensive production costs) I could see them getting new SKUs later with 5nm chips as well.
Andrei nailed it. The pipeline for server products and respective contracts is too long to switch off Milan. OEMs and customers would have a fit. A 5N Vermeer chiplet wouldn't be a re-tape, it would be a redesign. Now, if demand for Milan is sky high, then maybe it does make sense to delay Vermeer and put it on a 5nm node to meet demand requirements for Milan on 7N. This would have the advantage of shrinking the chiplet size on Vermeer allowing AMD to produce more many more dice per wafer for it's consumer brands. It's the only thing that makes sense IF this rumor is true.
 

DisEnchantment

Golden Member
Mar 3, 2017
1,684
6,227
136
Andrei nailed it. The pipeline for server products and respective contracts is too long to switch off Milan. OEMs and customers would have a fit. A 5N Vermeer chiplet wouldn't be a re-tape, it would be a redesign. Now, if demand for Milan is sky high, then maybe it does make sense to delay Vermeer and put it on a 5nm node to meet demand requirements for Milan on 7N. This would have the advantage of shrinking the chiplet size on Vermeer allowing AMD to produce more many more dice per wafer for it's consumer brands. It's the only thing that makes sense IF this rumor is true.
Mmm its just a momentary frenzy while digesting juicy information. Many got a bit excited.
After settling down we can already realize what's probable and what's not.😂😂

I don't know but somehow PC is interesting again for me after several years.
 

maddie

Diamond Member
Jul 18, 2010
4,787
4,771
136
An attempt to reconcile.

TSMC advancing as fast as possible. If necessary, roadmaps be damned.

Can offer 5NP earlier than expected by clients or even itself.

AMD being a top tier customer, gets preferential option to take or refuse 5NP wafer production.

Accepting will cause major changes to roadmaps.

Refusing will allow competitor (Nvidia?) earlier access to leading node.



AMD:

Decides to use 5NP for client and keep server roadmap as promised as they already way ahead in the cores & perf/watt departments. Server marketshare growth is determined by many other factors than just leadership performance. Stick to roadmap for those 'don't rock the boat too much guys'.

Much easier to convince an OEM to use a superior Ryzen in desktops and once one falls, it becomes harder for the rest to resist.

Both being EUV (5 & 7), the design changes are not too difficult.

Plan to fab 'same' Zen3 chiplet on 5NP instead of 7EUV and due to the density improvement, the chiplet die becomes much smaller, allowing more product for a given wafer order. Side effect is to release more die for the server market.

Releases a Ryzen 3xxx refresh to cover delay.



If this is even close to true, then we have to accept that TSMC is really the one company in the catbird seat. Everyone else is being directed by them to some degree.
 

nicalandia

Diamond Member
Jan 10, 2019
3,331
5,282
136
I remember people saying.. Oh 16 cores and 32 Threads are too much for Mainstream it will never happen... Bamm Amd got you covered for that CPU you don't need but want.. With Zen 4 5nm you can bet your house that they will bring the big guns and let you place a 24 core 48 Thread CPU on your Mainstream Mobo.. Just because...
 

gdansk

Platinum Member
Feb 8, 2011
2,489
3,377
136
I have no basis to say this whatsoever: Maybe they scrapped desktop Zen 3? That might explain the refresh and then Zen 4 will launch as the 4000 series earlier than originally planned (for Zen 4, but later than originally planned for the 4000 series).

But DigiTimes says it is Vermeer on 5nm+. Bizarre if that is the case. I will accept the delay part of the rumors if the refresh happens.
 
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Olikan

Platinum Member
Sep 23, 2011
2,023
275
126
I can't even keep up with the leaks...

AMD Ryzen 5000 Zen3 “Warhol” to succeed Vermeer

 

Ajay

Lifer
Jan 8, 2001
16,094
8,104
136
I have no basis to say this whatsoever: Maybe they scrapped desktop Zen 3? That might explain the refresh and then Zen 4 will launch as the 4000 series earlier than originally planned (for Zen 4, but later than originally planned for the 4000 series).

But DigiTimes says it is Vermeer on 5nm+. Bizarre if that is the case. I will accept the delay part of the rumors if the refresh happens.
I very very much doubt that Zen4 is ready for desktop. Can't prove it, but it'd be a freaking miracle of engineering.
 

HurleyBird

Platinum Member
Apr 22, 2003
2,725
1,342
136
Yeah, to me the Financial Day annonucements are also suspicious. They explicitly said "7nm" on slides in march twice (for both epyc and ryzen), yet for-instance totally omitted the process for CDNA2 or RDNA3.

If there was ever any hope for a Q4 5nm+ ramp, they had to know well before the investor day that they were gonna do it. They could have just ommited the process from all those slides and noone would have suspected anything (yet they would not have lied)

If this rumour is true, then I'm 99% sure that AMD developed 5nm and 7nm Zen 3 chiplets in parallel. AMD seems far too competent under Lisa Su to put all of their eggs in a 5nm hail Mary, especially considering what they've been witnessing at Intel. However, with parallel development AMD is effectively playing safe and hyper-aggressive at the same time. This makes sense on a few levels:
  • In this scenario, claiming Zen 3 is 7nm during financial events is not technically a lie, but by claiming 7nm they can blindside Intel with 5nm once that part is ready.
  • The chiplets themselves are tiny, so the development effort is significantly lessened versus doing the same for a big monolithic chip.
  • Getting a foot into the door as early as possible for 5nm will help AMD to secure capacity on that node.
  • AMD can use both 5nm and 7nm chiplets in products, probably with budget offerings using 7nm and high end parts 5nm. In the event of capacity constraints, AMD can increase 7nm and 5nm orders independently, increasing both theoretical capacity and flexibility.
  • 32MB"+" L3 cache... well, that makes a lot more sense now. 32MB on the 7nm chiplet, more on the 5nm chiplet.
  • IPC improvement speculation all over the map.
  • And here's a big one: this could go a long way to explaining the entire back compatibility fiasco. If Zen3 has two different versions, and it's not obvious that both versions will actually make it to the market, then it starts to make more sense not only why AMD ran out of room, but also why they left it so late to announce the 400 series chipsets wouldn't have support--they might not have known until recently.
To be honest, it makes a ton of sense in hindsight. There's a fair amount of circumstantial evidence. But I'm still skeptical that AMD actually made such a bold move. Kudos if so. Another thing to consider here is that if there are indeed two different versions of Zen 3, then it's possible that it's the 7nm version that launches this year with the 5nm version to come later.
 
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amrnuke

Golden Member
Apr 24, 2019
1,181
1,772
136
I can't even keep up with the leaks...

AMD Ryzen 5000 Zen3 “Warhol” to succeed Vermeer

Ryzen 5000
Zen3
What?
 

DisEnchantment

Golden Member
Mar 3, 2017
1,684
6,227
136
A very interesting interview with Lisa Su LIVE:

Lisa Su just mentioned that she feels very good about what they'll have beyond Renoir. The host explcitly asked about 5nm for future APUs (as AMD skipped those in the Financial Day slides). Lisa dodged the question pretty much, but did mention mentioned that 5nm is a very important node, they will use it heavily, Zen 4 will use it, but it's a bit early to talk about timing.

This was an answer to a quiestion talking specifically about mobile, 5nm and stuff after Renoir ...

One could spin quite a few 5nm conspiracy theories from that

EDITs:

Servers:
26:20 Still on track for 10% share 2020Q2. During second part of 2020 they will transitsion from marketshare target to how much it will be from AMD's revenue (finally!)
29:30 Server is prenominantly CPU (GPUs still minor part)

TSMC:
43:40 Wafer supply continues to be tight, but partnership is great

Interview has ended. Lots of other stuff (and probably things eariler) I missed.

She also said
- Zen was good, Zen2 was great and Zen3 would be even better (4:50 mark)
- Mobile will be first to 5nm (she meant Mobile as in ramp up from other silicon vendors, HiSilicon et al)
- RDNA2 will also be in APU (35:45 mark)
- Navi 2X similar time frame with console (36:46 mark)
 
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NostaSeronx

Diamond Member
Sep 18, 2011
3,688
1,222
136
Doesn't TSMC 5nm use the same design rules as N7+? Wouldn't a node switch there be a retape?
5nm doesn't reuse the design rules of 7nm+.

7nm+ drawn => ~54-nm Cx/~36-nm Mx
5nm drawn => ~48-nm Cx/~28-nm Mx <== High Mobility SiGe PFET and new spacers reduce the scaling of CPP, but comes with better performance, etc.
 
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moinmoin

Diamond Member
Jun 1, 2017
4,994
7,765
136
I have no basis to say this whatsoever: Maybe they scrapped desktop Zen 3? That might explain the refresh and then Zen 4 will launch as the 4000 series earlier than originally planned (for Zen 4, but later than originally planned for the 4000 series).
That's where I stand as well. No way AMD is moving an N7+ design to N5P (which don't use the same design rules) on such a short notice, with the former already being used for sampling in datacenters. TSMC is accelerating mass production N5P, so may have asked AMD to do the same for its silicon design already in the work for N5P which would be Zen 4, not 3. Though AMD's first N5P design actually realistically would be a GPU pipecleaner. This report doesn't amount to much imo.
 
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Atari2600

Golden Member
Nov 22, 2016
1,409
1,655
136
Sounds too good to be true IMO.

Which put simply, means it isn't true.

At best, there is a caveat or a qualification we are missing (i.e. part of market only), at worst - its AMD fishing for leakers.
 
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RetroZombie

Senior member
Nov 5, 2019
464
386
96
I can't even keep up with the leaks...
They might have put some IA police to work releasing random code names on random tsmc processes to catch out leakers so watch out.


On a serious note what i always expected for zen4 was just zen3 shrink into 5nm with two eight core ccx instead of one in the zen3, so zen4 design would be immediately released has soon as the 'new' process would be available.

There's also the frontier cpu for the DOE:
AMD Confirms Zen 4 EPYC Codename, and Elaborates on Frontier Supercomputer CPU
Forrest explained that the CPU is not Milan – it is actually a fully custom design CPU specifically for this project.
 
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