Isn't IPC tangential to memory latency/BW ? ZEN2 already has IPC advantage over Skylake cores and very sizable deficit in games and AotS benchmark.
My point is, to get results these good, AMD must have done something to memory subsystem, like cutting quite some latency, core/L3 redesign comes as part of it and on top of that.
Don't have to take the long way to memory if you hit the L3. It's harder to predict how much the unified L3 contributes compared to a straight up increase in cache size but I wouldn't be surprised if that's the single biggest upgrade in gaming benchmarks, even with the rumoured IF speed increase.