Discussion Speculation: Zen 4 (EPYC 4 "Genoa", Ryzen 7000, etc.)

[Vattila]

Except for the details about the improvements in the microarchitecture, we now know pretty well what to expect with Zen 3.

The leaked presentation by AMD Senior Manager Martin Hilgeman shows that EPYC 3 "Milan" will, as promised and expected, reuse the current platform (SP3), and the system architecture and packaging looks to be the same, with the same 9-die chiplet design and the same maximum core and thread-count (no SMT-4, contrary to rumour). The biggest change revealed so far is the enlargement of the compute complex from 4 cores to 8 cores, all sharing a larger L3 cache ("32+ MB", likely to double to 64 MB, I think).

Hilgeman's slides did also show that EPYC 4 "Genoa" is in the definition phase (or was at the time of the presentation in September, at least), and will come with a new platform (SP5), with new memory support (likely DDR5).

What else do you think we will see with Zen 4? PCI-Express 5 support? Increased core-count? 4-way SMT? New packaging (interposer, 2.5D, 3D)? Integrated memory on package (HBM)?

Vote in the poll and share your thoughts!

 

[Joe NYC]

I agree. There's no way Intel is going to outperform AMD in the data center until 2025 or later. Intel may beat AMD in performance between generations but I don't see them winning in energy efficiency.

We can quite confidently predict that 2022 will be a bad year for Intel in datacenter, with Sapphire Rapids just struggling to even get released, while AMD will have Milan, Milan-X, Genoa, and Bergamo about to be released.. 2023 likely as well, but 2024 is still wide open, IMO.

 

[Ajay]

They either take wafers from TSMC or they lose volume and its associated revenue. It looks like Gelsinger has already made his choice. Intel is still losing volume anyway, but not by as much by choosing to take TSMC wafers. TSMC isn't going to make this cheap. Further process missteps are not going to be pretty. And on top of all this, remember, AMD now has a decisive advantage in the server room. Genoa is already one generation ahead, and I see no indicator that Intel will catch up.

So, I think you are saying net wafer starts from Intel fabs will be going down because they are unable to fab enough dice on a leading edge node of their own.

That's not good in the short term. But, if they are able to scale more aggressively over the next few years, they can boost their wafer starts. Of course, if they can't grab enough customers for their Fab 2.0 project, then they will still be stuck being a relatively low output fab compared to TSMC. And, Intel will be hard pressed to keep up with TSMC - because of TSMC's massive scale. Sucks being Intel right now.

 

[moinmoin]

It looks like Gelsinger has already made his choice.

I honestly doubt it was his choice to make to begin with. I can imagine the decision to essentially give up on EUV and reboot the effort with High-NA EUV with increasing reliance on TSMC in-between may have been done under Bob Swan already. Gelsinger's choice likely was to double down on High-NA EUV and the push for IDM 2.0.

In any case it takes years for decisions to manifest as products customers can buy so Intel may still need time to turn around. This may well be why AMD appears to have lost all sense of urgency in the public, they are well prepared and can take time because they know Intel doesn't have room to react right now.

 

[DrMrLordX]

But, if they are able to scale more aggressively over the next few years, they can boost their wafer starts.

They can on 20A node. Before then, AMD essentially gets free reign to produce a superior product in the server room at incrementally higher volumes year-over-year (they still aren't producing enough product to completely usurp Intel's market position).

I honestly doubt it was his choice to make to begin with. I can imagine the decision to essentially give up on EUV and reboot the effort with High-NA EUV with increasing reliance on TSMC in-between may have been done under Bob Swan already. Gelsinger's choice likely was to double down on High-NA EUV and the push for IDM 2.0.

Possibly. If that's the case, Intel has had these plans under wraps for years.

 

[soresu]

This may well be why AMD appears to have lost all sense of urgency in the public, they are well prepared and can take time because they know Intel doesn't have room to react right now.

The problem is that Intel can buy (and it looks they already bought) out fab capacity from TSMC or Samsung to hamstring AMD's volume scaling.

Consider the insane waste in money they committed to contra revenue in smartphones, and I suspect Chromebooks too.

Given that it wouldn't surprise me at all to find a significant part of their TSMC strategy has to do with strangling AMD's supply as much as improving their own.

The same can be said of their attempts to break into the GPU market against nVidia who also rely on TSMC and Samsung.

 

[Ajay]

In any case it takes years for decisions to manifest as products customers can buy so Intel may still need time to turn around. This may well be why AMD appears to have lost all sense of urgency in the public, they are well prepared and can take time because they know Intel doesn't have room to react right now.

Bolded is the key phrase in your comment. If they didn't concern themselves with Intel as a competitor behind closed doors that would be worrisome. Agree on Bob Swan having more sense than Krzanich, who despite being from the Fab side of the business, really cared more about investor value (and hence the value of his own stock/options).

They can on 20A node. Before then, AMD essentially gets free reign to produce a superior product in the server room at incrementally higher volumes year-over-year (they still aren't producing enough product to completely usurp Intel's market position).

Yeah, tough to see Intel getting on par with AMD in terms of efficiency and server CPU performance and efficiency. On the desktop, Intel can stay closer by burning more watts, and they have a strong grip on the OEM desktop market.

 

[Doug S]

They either take wafers from TSMC or they lose volume and its associated revenue. It looks like Gelsinger has already made his choice. Intel is still losing volume anyway, but not by as much by choosing to take TSMC wafers. TSMC isn't going to make this cheap. Further process missteps are not going to be pretty. And on top of all this, remember, AMD now has a decisive advantage in the server room. Genoa is already one generation ahead, and I see no indicator that Intel will catch up.

Yes but once again you can't blame TSMC for "gutting" Intel. Intel made its own bed with its 10nm disaster and failure to design chips as good as AMD's. They bear 100% responsibility for the consequences. They are lucky to have the option of TSMC, who could have said "no sorry we view you as a competitor so we choose not to sell you any leading edge wafers". Then maybe you could blame TSMC for what that might do to Intel.

 

[Joe NYC]

Yes but once again you can't blame TSMC for "gutting" Intel. Intel made its own bed with its 10nm disaster and failure to design chips as good as AMD's. They bear 100% responsibility for the consequences. They are lucky to have the option of TSMC, who could have said "no sorry we view you as a competitor so we choose not to sell you any leading edge wafers". Then maybe you could blame TSMC for what that might do to Intel.

I wonder how much capacity N7 to N4 capacity TSMC will be selling to Intel. That, in theory, comes out of what AMD could use, to gain more permanent share for TSMC than selling to Intel, which publicly stated to plan to stiff TSMC, once shortage is over, and once Intel catches up with capacity and perhaps nodes.

I think TSMC is making a mistake here. TSMC should sell INTC the 3nm turkey, but really limit the other nodes, leave them for good customers.

 

[Doug S]

I wonder how much capacity N7 to N4 capacity TSMC will be selling to Intel. That, in theory, comes out of what AMD could use, to gain more permanent share for TSMC than selling to Intel, which publicly stated to plan to stiff TSMC, once shortage is over, and once Intel catches up with capacity and perhaps nodes.

I think TSMC is making a mistake here. TSMC should sell INTC the 3nm turkey, but really limit the other nodes, leave them for good customers.

Intel's plans to buy capacity were made quite some time in advance - enough lead time for TSMC to alter their planned ramp. So it isn't necessarily coming out of "what AMD could have used", it may be coming out of capacity that wasn't planned to be available a year or two later - or even never. TSMC always has fab building capacity well ahead of their needs - so if they want to expand faster than planned it is a matter of taking delivery on of the necessary equipment. The biggest obstacle would be EUV scanners, as those have a single source and ASML's manufacturing capacity is limited.

So in order to expand to meet Intel's needs TSMC probably got something else out of them beyond money. When this was first announced I speculated that since this would increase TSMC's need for EUV scanners and decrease Intel's, that maybe TSMC would get some of Intel's EUV orders from ASML. A couple months later a rumor appeared that exactly this had happened (though based on knowing how these rumors originate, it is possible that my speculation was the original "source" lol) It does appear Intel may be trying to skip ahead to high NA EUV though whether that is by design or was made necessary by giving up EUV orders to TSMC is unknown.

Regardless of the real story, AMD has no room to complain if Intel bought capacity they could have used. If they needed it, they should have paid in advance to reserve it themselves. I'm sick of the excuses and whining from the pro-AMD crowd about how evil Intel is buying up capacity to stop them from dominating the PC market, and how it is terrible how TSMC went along with it. Go cry me a river. AMD is a big boy company, they understand how things work at TSMC. You want capacity, you have to buy it. You can't expect it will just magically be available if demand exceeds projections and you want more wafers next quarter. That was true even before the pandemic put the worldwide supply chain into a twist.

 

[Mopetar]

Intel's plans to buy capacity were made quite some time in advance - enough lead time for TSMC to alter their planned ramp. So it isn't necessarily coming out of "what AMD could have used", it may be coming out of capacity that wasn't planned to be available a year or two later - or even never.

Technically it comes out of whoever was willing to pay the least for it, which is unlikely to be AMD. At best you could say that this may have prevented AMD from buying additional wafers of their own, or perhaps delayed them from purchasing more wafers in some way, but that really gets into the weeds.

 

[DrMrLordX]

The problem is that Intel can buy (and it looks they already bought) out fab capacity from TSMC or Samsung to hamstring AMD's volume scaling.

See below response involving Doug S.

The same can be said of their attempts to break into the GPU market against nVidia who also rely on TSMC and Samsung.

See commentary on nV and Qualcomm trying to play TSMC and Samsung off against one another (in other threads). nV has been playing games with TSMC to try to get better deals, only to get burned by inferior nodes from Samsung. Actually Qualcomm seems to have gotten the worst end of the stick there since they're going to be switching to N4 midyear to replace their Snapdragon 8 Gen 1 that will initially be on a 4LPE. N4 is so much better (and Dimensity 9000 is offering such stiff competition) that Qualcomm can't afford to spend another product generation stuck on Samsung. Interesting that they aren't opting to move to 3GAE midyear instead.

Yes but once again you can't blame TSMC for "gutting" Intel. Intel made its own bed with its 10nm disaster and failure to design chips as good as AMD's.

It isn't that I blame them. TSMC knows what they are doing. It's in their own best interest to make Intel dependent on their nodes. The play will work if Intel can't make a smooth transition back to their own manufacturing. If not, TSMC just makes a ton of money and expand production capacity.

Intel's plans to buy capacity were made quite some time in advance - enough lead time for TSMC to alter their planned ramp.

TSMC is likely charging Intel tons of money for their wafers and using the cash to expand capacity - especially when it comes to N3. As far as AMD is concerned, it looks like they have "all the N5 they need" and we don't even know when AMD will switch to N3 anyway. I'm still skeptical as to whether they will (or even can) get enough N5 to fulfill the needs of the market. Considering how well Milan sold, demand for Genoa/Bergamo should be through the roof.

 

[JasonLD]

Interesting that they aren't opting to move to 3GAE midyear instead.

Samsung took out 3GAE from their foundry roadmap earlier this year, probably indicating internal use only. Their first available 3nm node for foundry use is 3GAP in 2023.

 

[DrMrLordX]

Samsung took out 3GAE from their foundry roadmap earlier this year, probably indicating internal use only. Their first available 3nm node for foundry use is 3GAP in 2023.

Whoa really? I didn't even notice.

 

[Joe NYC]

So in order to expand to meet Intel's needs TSMC probably got something else out of them beyond money. When this was first announced I speculated that since this would increase TSMC's need for EUV scanners and decrease Intel's, that maybe TSMC would get some of Intel's EUV orders from ASML. A couple months later a rumor appeared that exactly this had happened (though based on knowing how these rumors originate, it is possible that my speculation was the original "source" lol) It does appear Intel may be trying to skip ahead to high NA EUV though whether that is by design or was made necessary by giving up EUV orders to TSMC is unknown.

I have not come across that. That would make it a worthwhile trade for TSMC (EUV machine deliver from Intel allocation ahead of schedule.

As far as N3, there were rumors that TSMC is asking for a substantial upfront cash payment, which would also make it worthwhile. Especially considering that initial N3 node seems to not be TSMC's finest

Regardless of the real story, AMD has no room to complain if Intel bought capacity they could have used. If they needed it, they should have paid in advance to reserve it themselves. I'm sick of the excuses and whining from the pro-AMD crowd about how evil Intel is buying up capacity to stop them from dominating the PC market, and how it is terrible how TSMC went along with it. Go cry me a river. AMD is a big boy company, they understand how things work at TSMC. You want capacity, you have to buy it. You can't expect it will just magically be available if demand exceeds projections and you want more wafers next quarter. That was true even before the pandemic put the worldwide supply chain into a twist.

I think AMD followed (in their ordering) a ramp that they considered prudent at the time.

But AMD growing at expense of Intel = TSMC growing at expense of Intel (the nemesis of both). So, you would think that TSMC would be the most flexible in order to seize this, what maybe once in the lifetime opportunity... Which I think TSMC has done to a great extent.

AMD, almost certainly did not increase their orders 65% year over year, but did get that much in the end...

 

[nicalandia]

I agree that 5950X should have at least 24C/48T given how expensive it is.

Expensive? 16C/32T of the fastest Core uArch ever imagine. The 5950X brought performance never heard of or attainable to mainstream and you talk about 24C/48T? That is what ThreadRipper is for.

 

[Joe NYC]

It isn't that I blame them. TSMC knows what they are doing. It's in their own best interest to make Intel dependent on their nodes. The play will work if Intel can't make a smooth transition back to their own manufacturing. If not, TSMC just makes a ton of money and expand production capacity.

It's a gamble, that Intel will not get its act together and will keep ordering.

Other companies (Apple, AMD) taking market from Intel is a non-brainer for TSMC, not a gamble.

There is nothing better about TSMC silicon being branded "Intel" rather than "Apple", or "AMD", or "MediaTek".

There is no such thing as Intel market. Now everything Intel makes is replaceable. So, there is no benefit to the gamble of providing Intel capacity.

TSMC is likely charging Intel tons of money for their wafers and using the cash to expand capacity - especially when it comes to N3. As far as AMD is concerned, it looks like they have "all the N5 they need" and we don't even know when AMD will switch to N3 anyway. I'm still skeptical as to whether they will (or even can) get enough N5 to fulfill the needs of the market. Considering how well Milan sold, demand for Genoa/Bergamo should be through the roof.

I wonder about that, if AMD has "all the N5 they need". Intel screwing up in the server market expanded the opportunity further, probably way above what AMD thought possible.

Ditto with NVidia making space heaters. That opportunity is going to be greater than AMD anticipated...

 

[igor_kavinski]

Expensive? 16C/32T of the fastest Core uArch ever imagine. The 5950X brought performance never heard of or attainable to mainstream and you talk about 24C/48T? That is what ThreadRipper is for.

It launched at a fair price. But now Alder Lake makes its pricing look questionable. It is no longer the fastest at everything anymore. Threadripper arrives too late compared to the mainstream parts based on same architecture and is too expensive.

 

[Hans Gruber]

Alder Lake beat every Zen 3 chip other than the 5950x. AMD should release either a 20 core 40 thread or 24 core 48 thread CPU on AM4 with the 3D V-cache. That would give them time to get Zen 4 ready while giving consumers a reason to stick with AMD.

Threadripper should have been released 6 months ago. With that said threadripper is in a different league than the mainstream desktop CPU's.

 

[Ajay]

It launched at a fair price. But now Alder Lake makes its pricing look questionable. It is no longer the fastest at everything anymore. Threadripper arrives too late compared to the mainstream parts based on same architecture and is too expensive.

I'm sure Threadripper (Chagall) will do fine in it's market segment. It's not a mainstream mainstream product. It's for professionals in science, engineering, video editing, GCI, etc.

 

[Abwx]

It launched at a fair price. But now Alder Lake makes its pricing look questionable. It is no longer the fastest at everything anymore. Threadripper arrives too late compared to the mainstream parts based on same architecture and is too expensive.

ADL is a 230W chip that try to compete with a 125W one, if you remove TDP from the equation then about everything is about competitive in its own segment.

 

[soresu]

Interesting that they aren't opting to move to 3GAE midyear instead.

Nanosheet may be a bridge too far for many silicon designers at the moment after several generations of product on finFET based process nodes.

Especially if N4 offers comparable performance due to TSMC's current lead.

If not, TSMC just makes a ton of money and expand production capacity.

Considering the current capacity crunch it's clear that the demand is there already to justify the investment with or without profits from Intel.

Lawd only knows what size mountain of greenbacks Apple lays down to get such a chunk of early state of the art nodes but it almost certainly helps TSMC fund new expansion.

Not to mention various govmts and multinational entities like the EU trying to catch their interest with prefential treatment and whiffs of billions in state sponsorship to promote the local economies.

 

[Doug S]

Technically it comes out of whoever was willing to pay the least for it, which is unlikely to be AMD. At best you could say that this may have prevented AMD from buying additional wafers of their own, or perhaps delayed them from purchasing more wafers in some way, but that really gets into the weeds.

That's ridiculous, TSMC is not taking capacity away from customers they've already committed to. It isn't a bidding war, Intel can't come in and say "hey we want this capacity we'll pay 30% more than customer X is paying" and TSMC tells customer X "sorry, we know you had these wafer runs scheduled for Q1 but someone else is paying us more so you're SOL. That's not how it works at all.

 

[Ajay]

Nanosheet may be a bridge too far for many silicon designers at the moment after several generations of product on finFET based process nodes.

Especially if N4 offers comparable performance due to TSMC's current lead.

I think Samsung LSI was trying to get a jump on the competition and came up short, as they usually do. It's really too bad as the world needs another logic fab company right now (if for nothing else, having a second source as a hedge against disasters).

 

[soresu]

It's for professionals in science

Aren't they more likely to be using multi node servers anyway whether the workload is CPU or GPU bound?

 

[Ajay]

That's ridiculous, TSMC is not taking capacity away from customers they've already committed to. It isn't a bidding war, Intel can't come in and say "hey we want this capacity we'll pay 30% more than customer X is paying" and TSMC tells customer X "sorry, we know you had these wafer runs scheduled for Q1 but someone else is paying us more so you're SOL. That's not how it works at all.

TSMC was doing that in the past (pay more for wafers to get higher up in the queue) - but as it irked many customers, they stopped. The only thing that hasn't changed is that Apple is still first in line and gets all the wafers they want. I had heard that TSMC was asking Intel for some 'pay to play' money - if true, I'm sure it was an advance just as happened recently with Nvidia (guessing that flirting with Samsung bit them in the butt).