Discussion Speculation: Zen 4 (EPYC 4 "Genoa", Ryzen 7000, etc.)

[Vattila]

Except for the details about the improvements in the microarchitecture, we now know pretty well what to expect with Zen 3.

The leaked presentation by AMD Senior Manager Martin Hilgeman shows that EPYC 3 "Milan" will, as promised and expected, reuse the current platform (SP3), and the system architecture and packaging looks to be the same, with the same 9-die chiplet design and the same maximum core and thread-count (no SMT-4, contrary to rumour). The biggest change revealed so far is the enlargement of the compute complex from 4 cores to 8 cores, all sharing a larger L3 cache ("32+ MB", likely to double to 64 MB, I think).

Hilgeman's slides did also show that EPYC 4 "Genoa" is in the definition phase (or was at the time of the presentation in September, at least), and will come with a new platform (SP5), with new memory support (likely DDR5).

What else do you think we will see with Zen 4? PCI-Express 5 support? Increased core-count? 4-way SMT? New packaging (interposer, 2.5D, 3D)? Integrated memory on package (HBM)?

Vote in the poll and share your thoughts!

 

[Mopetar]

4CU RDNA2 iGPU at 1100mhz. If rumors are legit, that is Smartphone low GPU frequency or for Desktop CPU that TDP footprint is very tiny.

Keep in mind, Samsung Exynos 2200 has 6CU RDNA2 iGPU with frequency 1100-1300mhz.

The 4 CUs won't take up much space. More would be used up by decoder blocks and the IO for connecting to display output. AMD can save on space by shipping with bare minimum essentials, but they may weigh the cost of complaints for doing that as part of the consideration even though most users will just have a discrete GPU. Those who don't are probably fine with VGA.

 

[jamescox]

You know after looking at this slide, I think AMD ought to decouple core+L2$ from the L3$ in their CCX. Then they can scale the logic, SRAM and Analog in a structure somewhat like this.
Logic can go to leading process nodes as it is scaling better (N5->N3 and so forth)
SRAM can maybe stop at N5 and then just like they optimized a denser process on n7 they can create a denser SRAM optimized process on N5.
Analog, I think can stay on N6 for a long time if area scaling according to the chart is accurate. The only caveat is if there is less power draw on other nodes to change it.
Then They can use 2.5D or 3D packaging, whichever is feasible and cost effective to make new CPUs.
If they use 2.5D, EFB that they used in MI200 looks optimal or they can use CoWoS.
For 3D, they can use The IOD as base as well as LSI, for the core+L2$ die and L3$ die

This is just a thought, be free to tell me if its not possible or just a ridiculous thought. And this is for CPUs after zen 4 just putting it here as there are no other speculation threads.

The EFB type of interconnect is designed for connecting something like HBM memory. That is a lot wider connection that external memory types, but it is nowhere close to the connectivity of v-cache with SoIC (thousands vs tens of thousands in the same area). I don’t think SoIC is used for bridging, so that is only for stacking directly on top of another die. They could possibly do an L4 cache of come kind with bridged chips; That is what the infinity cache chips for GPUs seem to be.

It is a lot more process steps to make a stacked device and all of those steps represent an opportunity for something to go wrong. Given the prices on stacked die for Milan and the 5800X3D, that stacking seems to be working very well, but I don’t know if they would move to completely stacked L3 caches. They would likely still want a cheap base die that can be used in some products with no stacking.

 

[yuri69]

16C would use less power even at 5GHz, a direct shrink of a 5950X with a 6nm based IO would consume about 55W@4GHz.

We can expect a Zen 4 based 16C to be within 65W at same frequency, it would require 130W for 5GHz all cores and 1.45x the MT perf of previous gen.

They can also pack 32C@4.3GHz@170W for 2.5x the MT throughput of a 5950X.

The features are not the same. The Zen 4 counterpart of 5950X got additional stuff affecting the TDP. There is an iGPU with required interconnect support. AVX-512 support. Reportedly, the chip achieves 5+GHz frequency. IO capabilities featuring way faster fabric, next-gen PCIe, next-gen DDR, etc.

Sum of all above might add a hefty portion of the total SoC TDP.

 

[CakeMonster]

AMD has been making the argument that their cores are smaller and more efficient than the competition though, I can't imagine the new stuff will use up all of the much increased power availability budget at 16c?

 

[Abwx]

The features are not the same. The Zen 4 counterpart of 5950X got additional stuff affecting the TDP. There is an iGPU with required interconnect support. AVX-512 support. Reportedly, the chip achieves 5+GHz frequency. IO capabilities featuring way faster fabric, next-gen PCIe, next-gen DDR, etc.

Sum of all above might add a hefty portion of the total SoC TDP.

At same process TDP would increase about proportionaly to MT IPC improvement, say 20%.
Faster fabric will change nothing since its data flow would increase by the same 20%, so Zen 4 should consume 20% more than Zen 3 at same frequency.

From 7nm to their custom 5nm power effcicency improvement is 2x, that hold for the chiplets, while the I/O shrink to 6nm from 12nm will undoubtly reduce power by the same 0.5x ratio.

A stock 5950X use 125W@4GHz, so we can expect Zen 4 to use 1.2 x 62.5 = 75W@4ghz for the CPU and 1-2W for the GPU.

Now assuming a cubic rate for power/frequency from 4 to 5GHz this result to 150W@5GHz and something like 50% better MT perf than the 5950X.

With 32C clocked at 4GHz they would have 2.4x the MT perf at same 150W while retaining the same ST perf, and a 24C would be in between those numbers.

Dunno what they are going to release but they have several options depending of the competition abilities.

 

[deasd]

Geona?

https://twitter.com/x/status/1508310069032669184

 

[eek2121]

Geona?

https://twitter.com/x/status/1508310069032669184

I found this result curious, so I did some digging. Up above, Geekbench reports the chip running at 3.43 GHz. Down below, we see the devil is in the details:

{
  "id": 15,
  "name": "Processor Frequency",
  "value": "1.20 GHz",
  "ivalue": 1200000000,
  "fvalue": 1200000000.0
}

 

[Tuna-Fish]

I found this result curious, so I did some digging. Up above, Geekbench reports the chip running at 3.43 GHz. Down below, we see the devil is in the details:

  "name": "Processor Frequency",
  "value": "1.20 GHz",

That can't possibly be right. That would imply >100% IPC gain for single-core loads from 5800x. It's much more likely that the frequency reporting isn't working properly.

 

[DisEnchantment]

I found this result curious, so I did some digging. Up above, Geekbench reports the chip running at 3.43 GHz. Down below, we see the devil is in the details:

{
  "id": 15,
  "name": "Processor Frequency",
  "value": "1.20 GHz",
  "ivalue": 1200000000,
  "fvalue": 1200000000.0
}

That is not the run frequency, look for the values like this tweet here

https://twitter.com/x/status/1508432525172957185

But anyhow, it seems, whoever was testing was given some crippled BIOS, somewhere some things were crippled. Some of the tests were atrociously bad vs Zen3.

 

[JoeRambo]

I found this result curious, so I did some digging. Up above, Geekbench reports the chip running at 3.43 GHz. Down below, we see the devil is in the details:

It is so called "Base frequency" -> reported by marketing in data sheets, but importantly it is the frequency internal TSC counter runs off. For example my 12900K is reported as 3.2Ghz there.

GB is mostly capable of reporting real frequency during test and it was fixed 3.425 ghz i think. Now obviuosly it is test platform, we don't know if what speed RAM ran, if prefetchers were enabled and so on, so MT and any ram speed dependant test is irrelevant making total score useless too.

This is comparison between ADL @ 3.4 and that Zen4 result:

AMD Corporation Quartz vs Micro-Star International Co., Ltd. MS-7D31 - Geekbench Browser

Some very impressive results for ZEN4 already in this state. I'd estimate 5% more Integer IPC versus current crop of Intel's big cores.

EDIT: did not notice that AMD's GB5 results was from Linux, so that makes it even less comparable and estimate of IPC hard.

 

[eek2121]

That is not the run frequency, look for the values like this tweet here

https://twitter.com/x/status/1508432525172957185

But anyhow, it seems, whoever was testing was given some crippled BIOS, somewhere some things were crippled. Some of the tests were atrociously bad vs Zen3.

It is so called "Base frequency" -> reported by marketing in data sheets, but importantly it is the frequency internal TSC counter runs off. For example my 12900K is reported as 3.2Ghz there.

GB is mostly capable of reporting real frequency during test and it was fixed 3.425 ghz i think. Now obviuosly it is test platform, we don't know if what speed RAM ran, if prefetchers were enabled and so on, so MT and any ram speed dependant test is irrelevant making total score useless too.

This is comparison between ADL @ 3.4 and that Zen4 result:

AMD Corporation Quartz vs Micro-Star International Co., Ltd. MS-7D31 - Geekbench Browser

Some very impressive results for ZEN4 already in this state. I'd estimate 5% more Integer IPC versus current crop of Intel's big cores.

EDIT: did not notice that AMD's GB5 results was from Linux, so that makes it even less comparable and estimate of IPC hard.

We don't know which frequency it ran at. I'm aware of what the values mean, of course. We learned in the past that you could set the frequency to whatever you wanted with EPYC, but it does not mean it would hit that frequency. I.E. What is being reported is not what the chip is running at. That is why the EPYC 'overclock' was not really an overclock.

The scores are much too low for it to be running at those speeds.

 

[DisEnchantment]

AMD Corporation Quartz vs ASUSTeK COMPUTER INC. RS500A-E10-RS4 - Geekbench

browser.geekbench.com

It is crippled/throttled by the interconnect, ST score is 82% and MT score is 15% of a matching 32 Core 7513.
Its clock was allowed to run high but the MT scores are just rubbish, which is a symptom of interconnect throttling or something wrong with the fabric (like low fclk or disabled memory channels for example)

 

[tamz_msc]

It's futile trying to estimate IPC from pre-release Geekbench runs on engineering samples. It is even more futile trying to speculate on reasons behind the 'abnormal' scores of such samples.

 

[Thibsie]

It's futile trying to estimate IPC from pre-release Geekbench runs on engineering samples. It is even more futile trying to speculate on reasons behind the 'abnormal' scores of such samples.

Sure but news are slow these days so what the heck how we supposed to do in the mean time ? xD

 

[lobz]

Because it is, and it's well known. Zen 2 was a supercharged version of Zen 1, same should be true for Zen 4 over Zen 3.

The modern version of Intel's Tick-Tock.
Just please let's not call it TikTok.

 

[Thibsie]

The modern version of Intel's Tick-Tock.
Just please let's not call it TikTok.

Well, Intel didn't supercharge anything but the process back in time AFAICT.

 

[lobz]

Well, Intel didn't supercharge anything but the process back in time AFAICT.

hence the modern version and not the same 😂

 

[Thibsie]

hence the modern version and not the same 😂

Well that's why I wouldn't use " tick-tock " at all.

 

[leoneazzurro]

https://twitter.com/x/status/1508785076712062991

So it should be early/mid Q3

 

[eek2121]

https://twitter.com/x/status/1508785076712062991

So it should be early/mid Q3

Yep, I think we’ve established that. I hope it is a complete win against the competition. Intel deserves nothing less after their comments about leaving AMD in the rearview mirror.

I might buy the top SKU. If it is indeed 170W for 16c/32t, it will be interesting to see how it compares to my 5950x.

 

[igor_kavinski]

I might buy the top SKU. If it is indeed 170W for 16c/32t, it will be interesting to see how it compares to my 5950x.

That would kind of be a regression, no? Sure, performance will be better but AMD likes emphasizing their power efficiency. Could it be that it's a 24-core/48-thread part?

 

[exquisitechar]

Yep, I think we’ve established that. I hope it is a complete win against the competition. Intel deserves nothing less after their comments about leaving AMD in the rearview mirror.

7950x will be great, no doubt. I'm more curious to see how they'll manage to compete in the mid range/low end segments with how many E cores Intel will be packing.

That would kind of be a regression, no? Sure, performance will be better but AMD likes emphasizing their power efficiency. Could it be that it's a 24-core/48-thread part?

They could afford to emphasize power efficiency because they were crushing Intel in MT performance even at relatively low clock speeds due to having a massive core count advantage. With Raptor Lake topping out at 8 P and 16 E cores, AMD will need to push power consumption higher than the previous generation if they hope to have a lead at all. Zen 4 will probably clock really high too.

 

[Exist50]

7950x will be great, no doubt. I'm more curious to see how they'll manage to compete in the mid range/low end segments with how many E cores Intel will be packing.

They could afford to emphasize power efficiency because they were crushing Intel in MT performance even at relatively low clock speeds due to having a massive core count advantage. With Raptor Lake topping out at 8 P and 16 E cores, AMD will need to push power consumption higher than the previous generation if they hope to have a lead at all. Zen 4 will probably clock really high too.

I doubt AMD needs much extra power, if any at all. Today they're about tied, give or take. +8 GRT cores and more cache vs a full node shrink and new uarch? I think they'll be just fine. 170W would be to be the undisputed leader.

 

[exquisitechar]

170W would be to be the undisputed leader.

I think that's what they're going for, yes. They could match Raptor Lake at lower than that, but prefer performance leadership.

 

[Exist50]

I think that's what they're going for, yes. They could match Raptor Lake at lower than that, but prefer performance leadership.

The more I think about it, the more I'm convinced they wouldn't even need any more power to beat Raptor Lake. Raphael should easily hold the performance crown through till '24.