Discussion Speculation: Zen 4 (EPYC 4 "Genoa", Ryzen 7000, etc.)

[Vattila]

Except for the details about the improvements in the microarchitecture, we now know pretty well what to expect with Zen 3.

The leaked presentation by AMD Senior Manager Martin Hilgeman shows that EPYC 3 "Milan" will, as promised and expected, reuse the current platform (SP3), and the system architecture and packaging looks to be the same, with the same 9-die chiplet design and the same maximum core and thread-count (no SMT-4, contrary to rumour). The biggest change revealed so far is the enlargement of the compute complex from 4 cores to 8 cores, all sharing a larger L3 cache ("32+ MB", likely to double to 64 MB, I think).

Hilgeman's slides did also show that EPYC 4 "Genoa" is in the definition phase (or was at the time of the presentation in September, at least), and will come with a new platform (SP5), with new memory support (likely DDR5).

What else do you think we will see with Zen 4? PCI-Express 5 support? Increased core-count? 4-way SMT? New packaging (interposer, 2.5D, 3D)? Integrated memory on package (HBM)?

Vote in the poll and share your thoughts!

 

[eek2121]

Threadripper has 4.5GHz a boost, but you won't reach It with all cores within 280W TDP, so why do you even mention It? 4.5GHz would require ~ 456W just for the cores(7.125W/core at ~4.5GHz).

If I leave 256W from 280W TDP to 64 cores, It would mean 4W per core and that would mean probably ~3-3.2GHz clockspeed. Is that supposedly a decent clockspeed or just a very conservative one?
Intel could put 64 cores into 280W TDP(32P + 32E cores). Yes, clocks would be quite low, comparable to what i7 12900 has at PL2 65W(see my above post), but still doable unlike what you said. On the oher hand, size would be a big problem, because unlike Threadripper It would be a monolith. In the end this is a still pretty bad comparison in my opinion.

That's great, none of the CPUs under discussion are capable of maintaining max boost to all cores under current power limits. The 12900 has a PL2 of 202W, not 65W. That is substantially higher than a 5950x (with a PPT of 142W). The 5950x still manages to have a far higher base clock than the Intel chip, regardless. My point is, Intel is behind in the efficiency curve, and Raptor Lake is going to make that worse, not better. Zen 4 is going to improve efficiency, not make it worse.

 

[Henry swagger]

That's great, none of the CPUs under discussion are capable of maintaining max boost to all cores under current power limits. The 12900 has a PL2 of 202W, not 65W. That is substantially higher than a 5950x (with a PPT of 142W). The 5950x still manages to have a far higher base clock than the Intel chip, regardless. My point is, Intel is behind in the efficiency curve, and Raptor Lake is going to make that worse, not better. Zen 4 is going to improve efficiency, not make it worse.

No testing has been made so d'not assume.. amd us afraid to lose to intrl in multi-core thats why they clocking it to the moon 230w ppt lol

 

[H T C]

No testing has been made so d'not assume.. amd us afraid to lose to intrl in multi-core thats why they clocking it to the moon 230w ppt lol

Stupid question: is there ANY indication the CPUs with up to 16 cores will have that PPT?

What we know so far is that THE SOCKET supports CPUs with up to 230 PPT, but that doesn't necessarily mean CPUs with up to 16 cores REQUIRE such a high PPT.

 

[exquisitechar]

Stupid question: is there ANY indication the CPUs with up to 16 cores will have that PPT?

What we know so far is that THE SOCKET supports CPUs with up to 230 PPT, but that doesn't necessarily mean CPUs with up to 16 cores REQUIRE such a high PPT.

I think Robert Hallock confirmed that Ryzen 7000 would, yes.

 

[CakeMonster]

More or less, he said that prototype ran between 105 and 170, but that they appreciated the headroom that had held them back on Zen3.

 

[H T C]

I think Robert Hallock confirmed that Ryzen 7000 would, yes.

This means that @ LEAST ONE of the 7000 Ryzen CPUs uses such a PPT, but not necessarily CPUs with up to 16 cores, or did he specify that? I don't recall.

More or less, he said that prototype ran between 105 and 170, but that they appreciated the headroom that had held them back on Zen3.

Same thing here: he's being vague enough and the Ryzen 7000 up to 16 core CPU(s) can "just as easily" use 105.

 

[jpiniero]

This means that @ LEAST ONE of the 7000 Ryzen CPUs uses such a PPT, but not necessarily CPUs with up to 16 cores, or did he specify that? I don't recall.

Same thing here: he's being vague enough and the Ryzen 7000 up to 16 core CPU(s) can "just as easily" use 105.

I think it's a given that the 16 core will be 170. The 8 and 12 won't be.

 

[DrMrLordX]

By giving the Zen 4 chip more power, more cores can operate at higher clocks

N5/N5P should also let them operate at at least slightly higher clocks @ isopower compared to Zen3 unless there's more core logic at work than we currently suspect (increasing current draw).

That article was BS about Intel, they didn't say what was delayed.

It's probably Sapphire Rapids. If AMD is easing up on Genoa in any respect, it's almost guaranteed to be Sapphire Rapids.

 

[DisEnchantment]

It's probably Sapphire Rapids. If AMD is easing up on Genoa in any respect, it's almost guaranteed to be Sapphire Rapids.

Its SPR. The additional delay is not by much.
Its probably related to many features around TDX.
Just a reminder, Google delayed Milan based SNP CoCo instances due to HW bugs which got fixed in B2 chiplets. Lots of the details from recent Google Project Zero PR re Confidential Computing were very vague about HW bugs but from CVEs and the revision guidance you can find info about Milan SNP HW bugs which got fixed in B2 rev. Btw, Google VM instances with SNP backed CoCo went GA just a month or so ago. So Milan HW bugs delayed it a lot.

 

[TESKATLIPOKA]

My point is, Intel is behind in the efficiency curve, and Raptor Lake is going to make that worse, not better. Zen 4 is going to improve efficiency, not make it worse.

Raptor Lake should be more efficient in MT than ADL at the same TDP, thanks to more E-cores and separate voltage regulator.
Zen4 will be more efficient than Zen3 at the same TDP, but that's to be expected considering they use a better process.
The 170W 16C32T Zen4 monster could end up with worse power efficiency in MT than the current TOP 5950x, unless It can provide at least 62% uplift in MT performance.
I expect Zen4 even the 170W version to have better efficiency than Raptor Lake.

 

[gruffi]

AMD cannot afford to have low clocks anywhere, the Skylake days are over and in it's place is brutal GC core backed by efficiency cores.
The reality is that Intel will fight 7600X with 13600K that is rumored 6P + 8E. 7800x will be assaulted by 13700K with 8P + 8E config and so on, increase of E cores trickles down the line.

7950x has 8vs8 (vs 8P) that leaves 8 Z4 cores fighting 16E
7900x has 6+6 (vs 8P) that leaves 4 cores fighting 8E
7800x has 8 (vs 8P) that leaves 8E cores
7600x has 6 (vs 6P)that leaves 8E cores

Intel needs at least two E-cores to equalize one P-core.


Because I expect Zen 4 to be at least similar performant as Golden Cove I don't see much problems here for AMD. They can theoretically counter any Intel configuration.

16P vs 8P+16E
12P vs 8P+8E
10P vs 6P+8E
8P vs 6P+4E
etc.

But that's secondary. Actual average performance will decide about competitors and pricing. And E-cores are quite useless in many scenarios, like gaming.

40% compared to what? 12900K? 5950x? What power limits? Sorry this number is meaningless without any context.

Compared to current gen, of course. And it's not meaningless. Because 5.5 GHz all core in heavy MT workloads like Blender is quite unrealistic, we are probably looking at 40% performance increase with 25% higher clocks. Which means it could be at least 10% higher IPC. More than just Zen 3++.

 

[moinmoin]

Just a reminder, Google delayed Milan based SNP CoCo instances due to HW bugs which got fixed in B2 chiplets. Lots of the details from recent Google Project Zero PR re Confidential Computing were very vague about HW bugs but from CVEs and the revision guidance you can find info about Milan SNP HW bugs which got fixed in B2 rev. Btw, Google VM instances with SNP backed CoCo went GA just a month or so ago. So Milan HW bugs delayed it a lot.

Thanks for the mention, saw a wired article on the cooperation but not the technical details yet. So for the record here's Google Project Zero's news regarding findings in Milan's SEV/SNP with links to further detailed posts and reports:

Release of Technical Report into the AMD Security Processor

Posted by James Forshaw, Google Project Zero Today , members of Project Zero and the Google Cloud security team are releasing a techni...

googleprojectzero.blogspot.com

 

[jamescox]

Raptor Lake should be more efficient in MT than ADL at the same TDP, thanks to more E-cores and separate voltage regulator.
Zen4 will be more efficient than Zen3 at the same TDP, but that's to be expected considering they use a better process.
The 170W 16C32T Zen4 monster could end up with worse power efficiency in MT than the current TOP 5950x, unless It can provide at least 62% uplift in MT performance.
I expect Zen4 even the 170W version to have better efficiency than Raptor Lake.

I doubt that AMD will be pushing it too far up the frequency / power curve. If it is significantly more power efficient at any clock speed that Zen 3 can run at but it can clock significantly higher, and therefore pull more power, would you still classify that as less efficient than Zen 3? I don’t think I would call that less efficient. Yeah, your performance per watt is likely lower at the extreme end, but your absolute performance would still be significantly higher.

Would people prefer that AMD leave the power limits lower and say, “Well it could run all core at 5 GHz, if only we had a little more power headroom”? Considering where GPUs are going, I suspect 170 Watts will not look very high. It already doesn’t seem to bad compared to Intel’s essentially overclocked parts. The larger GPUs aren’t a case of lower efficiency, they are just going to be able to offer significantly larger parts via advanced packaging tech using multiple chips. Would you call the Apple M1 Ultra inefficient?

If a 16 core part at 170 Watts exist, then I do wonder if the chunky lid will actually be an integrated vapor chamber, at least on higher end parts. Getting near 170 Watts out of two little chiplets (150 mm2?) seems difficult, but we may already have some GPUs at near that power density. The chiplet packaging looks a bit different, so I expect there is some advanced packaging tech in use, so it may be plausible that there are some other surprises.

 

[Timmah!]

This means that @ LEAST ONE of the 7000 Ryzen CPUs uses such a PPT, but not necessarily CPUs with up to 16 cores, or did he specify that? I don't recall.

i think i read he confirmed 16 cores max for the 7000 generation, so even if he did not specify that PPT for CPU with up to 16 cores, since there is not going to be more cores than that, what else could it be than 16c product?

except future products like zen 5, ryzen 8000 potentially with more cores than 16, but thats anyones guess at this point.

 

[igor_kavinski]

Is anything stopping AMD from having a 32 core Zen4C part and designate it as 7995X?

 

[biostud]

So what are your guess towards performance/watt compared to zen3? Better, worse, same?

 

[igor_kavinski]

So what are your guess towards performance/watt compared to zen3? Better, worse, same?

Slightly worse, because Raptor Lake is going to be better than Alder Lake and AMD has yet to show any of their CPUs beating ADL in single threaded performance. Zen 4 may be forced to consume just a bit more power to keep Raptor Lake away at a safe distance in MT workloads. However, I think Raptor Lake may still turn out to be the ST king. Intel will defend their territory ferociously, power be damned!

 

[Henry swagger]

Slightly worse, because Raptor Lake is going to be better than Alder Lake and AMD has yet to show any of their CPUs beating ADL in single threaded performance. Zen 4 may be forced to consume just a bit more power to keep Raptor Lake away at a safe distance in MT workloads. However, I think Raptor Lake may still turn out to be the ST king. Intel will defend their territory ferociously, power be damned!

Amd have to worry because the e-cores are getting for l2 plus clock speed increase. That 12-15 ipc on the e-core

 

[igor_kavinski]

Amd have to worry because the e-cores are getting for l2 plus clock speed increase. That 12-15 ipc on the e-core

Yeah, I'm beginning to think there's a good reason why Patty said AMD's in the rear view mirror. They probably got their hands on a ZEN 4 engineering sample, extrapolated its performance and reached the conclusion that they can easily beat it, at least in desktops.

 

[deasd]

Sounds like they only add a few but not all AVX512 family to Zen4, and it's just due to AI :

Your presentation mentioned "AI acceleration." Is that AVX-512 or something more exotic, like Intel GNA?
Yes. Specifically, AVX 512 VNNI for neural networking and AVX 512 BLOAT16 for inferencing.

Since whole AVX512 family is huge which are more than just AI usage, my speculation about Zen4 would change quite a bit, like this would not consume so much transistor/area. And performance bring by these changes would be limited.

Compared to current gen, of course. And it's not meaningless. Because 5.5 GHz all core in heavy MT workloads like Blender is quite unrealistic, we are probably looking at 40% performance increase with 25% higher clocks. Which means it could be at least 10% higher IPC. More than just Zen 3++.

agree. CPU rendering sometimes execute at lower clock since it utilize wider FPU units and consume more power. I guess all 16 cores under 5Ghz since LusaSu demostrate 8cores @5Ghz during gaming.

Yeah, I'm beginning to think there's a good reason why Patty said AMD's in the rear view mirror. They probably got their hands on a ZEN 4 engineering sample, extrapolated its performance and reached the conclusion that they can easily beat it, at least in desktops.

IMO Intel should accelerate their SapphireRapids and Raptorlake first before hype....

 

[biostud]

Slightly worse, because Raptor Lake is going to be better than Alder Lake and AMD has yet to show any of their CPUs beating ADL in single threaded performance. Zen 4 may be forced to consume just a bit more power to keep Raptor Lake away at a safe distance in MT workloads. However, I think Raptor Lake may still turn out to be the ST king. Intel will defend their territory ferociously, power be damned!

And when you're talking about ST it is productivity benchmarks? Not gaming?

 

[JoeRambo]

Since whole AVX512 family is huge which are more than just AI usage, my speculation about Zen4 would change quite a bit, like this would not consume so much transistor/area. And performance bring by these changes would be limited.

No need to speculate, leaks already told us that they have very wide AVX512 support, on the level of SunnyCove CPUs plus BF16 from Cooper Lake. It will be funny when Z4 comes earlier than Saphire Rapids that also supports them ( ICL stuff did not have BF16). Still it is all mostly irrelevant as NN stuff on CPUs is as relevant as using Z80 for high FPS gaming.

What leaks did not tell us is the performance, basically how many AVX512 512bit ops per cycle, and there is quite wide variety of them, like FMA, IFMA, VNNI, GFNI etc
it just takes a single prototype chip in the hands of someone to run InstLat64x stuff to present complete info, so it's not far away for sure.

 

[TESKATLIPOKA]

I doubt that AMD will be pushing it too far up the frequency / power curve. If it is significantly more power efficient at any clock speed that Zen 3 can run at but it can clock significantly higher, and therefore pull more power, would you still classify that as less efficient than Zen 3? I don’t think I would call that less efficient. Yeah, your performance per watt is likely lower at the extreme end, but your absolute performance would still be significantly higher.

I already said that Zen4 will be more power efficient at the same TDP, but the 170W model could end up with lower power efficiency than 5950x. This doesn't mean that model will be a bad product, It will just trade power efficiency for performance.

 

[igor_kavinski]

And when you're talking about ST it is productivity benchmarks? Not gaming?

Just Geekbench 5 ST.

 

[uzzi38]

Sounds like they only add a few but not all AVX512 family to Zen4, and it's just due to AI :



Since whole AVX512 family is huge which are more than just AI usage, my speculation about Zen4 would change quite a bit, like this would not consume so much transistor/area. And performance bring by these changes would be limited.

View attachment 62284





agree. CPU rendering sometimes execute at lower clock since it utilize wider FPU units and consume more power. I guess all 16 cores under 5Ghz since LusaSu demostrate 8cores @5Ghz during gaming.


IMO Intel should accelerate their SapphireRapids and Raptorlake first before hype....

The Gigabyte leak showed that Zen 4 includes everything here except VP2INTERSECT