Discussion Speculation: Zen 4 (EPYC 4 "Genoa", Ryzen 7000, etc.)

[Vattila]

Except for the details about the improvements in the microarchitecture, we now know pretty well what to expect with Zen 3.

The leaked presentation by AMD Senior Manager Martin Hilgeman shows that EPYC 3 "Milan" will, as promised and expected, reuse the current platform (SP3), and the system architecture and packaging looks to be the same, with the same 9-die chiplet design and the same maximum core and thread-count (no SMT-4, contrary to rumour). The biggest change revealed so far is the enlargement of the compute complex from 4 cores to 8 cores, all sharing a larger L3 cache ("32+ MB", likely to double to 64 MB, I think).

Hilgeman's slides did also show that EPYC 4 "Genoa" is in the definition phase (or was at the time of the presentation in September, at least), and will come with a new platform (SP5), with new memory support (likely DDR5).

What else do you think we will see with Zen 4? PCI-Express 5 support? Increased core-count? 4-way SMT? New packaging (interposer, 2.5D, 3D)? Integrated memory on package (HBM)?

Vote in the poll and share your thoughts!

 

[uzzi38]

Computex: Beyond the Coverage

What they didn't tell you.

www.angstronomics.com

Skygod strikes again!

Seriously though, read this article.

 

[igor_kavinski]

Computex: Beyond the Coverage

What they didn't tell you.

www.angstronomics.com

While Angstronomics is aware of an Ordering Part Number (OPN) that is fused for a 5.85 GHz Fmax, we will have to wait and see what the retail stepping fuses will be set at.

Intriguing.

 

[uzzi38]

Intriguing.

Just to give a little bit of context to that bit, the 5950X has an Fmax of 5.05GHz, while the rated boost is 4.9GHz.

 

[Markfw]

Just to give a little bit of context to that bit, the 5950X has an Fmax of 5.05GHz, while the rated boost is 4.9GHz.

But here is what you get when you load all 16 cores 100% indefinitely. 3.7 ghx and 110 watt cpu. BIOs=Stock

 

[uzzi38]

But here is what you get when you load all 16 cores 100% indefinitely. 3.7 ghx and 110 watt cpu. BIOs=Stock
View attachment 62296

Very true, and also why the increased power limits will make a difference, even with the more power efficient core.

 

[JoeRambo]

But here is what you get when you load all 16 cores 100% indefinitely. 3.7 ghx and 110 watt cpu. BIOs=Stock

It's 146W package power actually and in no way stock as it has 3600C16 DRAM.

EDIT: it is 3200 after all, i just don't expect anyone one technical forums to run uncoupled mode and shove their SOC with 1.2V for 3200 speed.

 

[Markfw]

It's 146W package power actually and in no way stock as it has 3600C16 DRAM. And i think 3600 was achieved by clicking that XMP button in BIOS, that is a big no-no as far as stock settings go as it is showing Your SOC with 1.2V of voltage, that is perfectly stable but probably above what is required and causes SOC to burn power.

The CPU is stock, and the ram is rated for the motherboard and running at it stock rated speed. I don't call that overclocked when the motherboard manual shows it was stock. And its 142 watt ppt and 110 watt cpu. Where did you get 148 ?

 

[JoeRambo]

The CPU is stock, and the ram is rated for the motherboard and running at it stock rated speed. I don't call that overclocked when the motherboard manual shows it was stock. And its 142 watt ppt and 110 watt cpu. Where did you get 148 ?

103% of 142W PPT is 146W of package power. And on topic of "stock" or not "stock". IF You ever click a button with XMP, X.O.P. or whatever called button in BIOS to get DRAM to run 3200C16, then it is game over for being STOCK.

 

[Saylick]

Intriguing.

6 GHz, here we come!

 

[Abwx]

103% of 142W PPT is 146W of package power. And on topic of "stock" or not "stock". IF You ever click a button with XMP, X.O.P. or whatever called button in BIOS to get DRAM to run 3200C16, then it is game over for being STOCK.

It is 103% of the 105W TDP, 135% is when power is at 142W, you understand better this way..?..

PPT = 1.35x TDP.

 

[nicalandia]

Computex: Beyond the Coverage

What they didn't tell you.

www.angstronomics.com

Skygod strikes again!

Seriously though, read this article.

As I suspected, the gold color is a very thin layer of gold.

 

[JoeRambo]

It is 103% of the 105W TDP, 135% is when power is at 142W, you understand better this way..?..

PPT = 1.35x TDP.

Not sure why are You replying to me? TDP is 105W, PPT is 1.35x of that, limiting total package draw to 142W, but not uncommon to go + several % above it.
Mark claimed his CPU is 110W for 3.7Ghz, when in fact it is 146W for 3.7Ghz due to his very high demand load ( very good result ).

That 110W figure is for cores, leaving rest of package to account for 36W ( and that is good result also, considering he is showing 1.2V vSOC ).

So basically @Markfw can improve efficiency by quite some by doing the following:

1) Loading BIOS defaults
2) MANUALLY setting DDR4 speed to 3200 and manually punching 16-16-16-53 as his primary timings
3) Making sure he is in coupled mode for imc / fabric, both should be 1600 and vSOC defaults should be much lower

 

[Saylick]

Computex: Beyond the Coverage

What they didn't tell you.

www.angstronomics.com

Skygod strikes again!

Seriously though, read this article.

7% ST IPC and 10% MT IPC is lower than I expected but the clocks are higher. Much higher. Looks like we'll see around a 20% ST improvement if we get 5.8 GHz clocks and 7% IPC. Possibly better improvement in games due to larger L2.

 

[Markfw]

Not sure why are You replying to me? TDP is 105W, PPT is 1.35x of that, limiting total package draw to 142W, but not uncommon to go + several % above it.
Mark claimed his CPU is 110W for 3.7Ghz, when in fact it is 146W for 3.7Ghz due to his very high demand load ( very good result ).

That 110W figure is for cores, leaving rest of package to account for 36W ( and that is good result also, considering he is showing 1.2V vSOC ).

So basically @Markfw can improve efficiency by quite some by doing the following:

1) Loading BIOS defaults
2) MANUALLY setting DDR4 speed to 3200 and manually punching 16-16-16-53 as his primary timings
3) Making sure he is in coupled mode for imc / fabric, both should be 1600 and vSOC defaults should be much lower

What I was more pointing to, is the speed. 5.05, 4.9, none of these are even close to what you get under full load all 32 threads. 3.7 is it.

 

[exquisitechar]

Computex: Beyond the Coverage

What they didn't tell you.

www.angstronomics.com

Skygod strikes again!

Seriously though, read this article.

Gold mine of an article.

Just to give a little bit of context to that bit, the 5950X has an Fmax of 5.05GHz, while the rated boost is 4.9GHz.

So we should expect a rated boost of 5.7 GHz, perhaps? My expectation before Computex was 5.4, that's pretty impressive. Curious to see how efficient it will be at 5.0 GHz or so.

 

[Abwx]

Mark claimed his CPU is 110W for 3.7Ghz, when in fact it is 146W for 3.7Ghz due to his very high demand load ( very good result ).

That s not 146W.

TDP is 105W and PPT is 142W.

So the CPU can get up to 135% of the TDP, that is 142W.

In the case of Mark his CPU use 103% out of 135% of the PPT, so his 110W is right.

Btw, in CB the 5950X use 125W@4GHz.

 

[Abwx]

dp

 

[exquisitechar]

He confirmed no such thing. He did say that the demo used less power than the limit.

I wasn't talking about the demo.

 

[moinmoin]

Computex: Beyond the Coverage

What they didn't tell you.

www.angstronomics.com

Skygod strikes again!

Seriously though, read this article.

Interesting that he says more than 16 cores have never been seriously considered. He does mention the usual "Ryzen 7000 desktop" qualifier also used everywhere else which makes me think that it may well happen with a later series. But then he also mentions there are no plans to introduce Zen 4c dense core CCDs on AM5, missing above qualifier. As I expect Dragon Range to be the name for Raphael-H, which again would be the perfect framework to introduce Zen 4c cores in, the above (if taking him at his word) hints that those CCDs may us an incompatible package hierarchy (new layout and new IOD) with no plans to adapt that to mobile and desktop.

One WGP on the IOD would match with the rumored spec of Mendocino he also repeated here, so it's likely a shared IP block, with both the Raphael IOD and Mendocino being on N6.

 

[DrMrLordX]

Intel can put their eDRAM on an ADL die too.

Intel hasn't used eDRAM since the i7-5775c. The eDRAM they used back then was less-performant than tuned DDR4 on a Skylake memory controller. And by tuned, I mean in the ballpark of DDR4-2933 - DDR4-3200. Stuff that's cheap and easy to obtain by modern standards. It's not clear that eDRAM L4$ would offer much benefit on a DDR5 system.

Seriously though, read this article.

Interesting stuff. Cooler compatability killed 24c Raphael? Also I hope AMD has some good solutions for heat density under the lid 'cuz Matisse was already a pita to cool.

 

[Aapje]

Interesting that he says more than 16 cores have never been seriously considered.

Robert Hallock said that Threadripper would return, so I would expect more cores under that name.

 

[igor_kavinski]

Intel hasn't used eDRAM since the i7-5775c. The eDRAM they used back then was less-performant than tuned DDR4 on a Skylake memory controller. And by tuned, I mean in the ballpark of DDR4-2933 - DDR4-3200. Stuff that's cheap and easy to obtain by modern standards. It's not clear that eDRAM L4$ would offer much benefit on a DDR5 system.

Last CPU with eDRAM was i7-8569U (Macbook only, sadly) in Q2-2019.



eDRAM has much better latency so a game might still get data from eDRAM quicker than DDR5.

 

[Henry swagger]

Last CPU with eDRAM was i7-8569U (Macbook only, sadly) in Q2-2019.

View attachment 62307View attachment 62308

eDRAM has much better latency so a game might still get data from eDRAM quicker than DDR5.

Edram will be use for igpu's and consoles

 

[DrMrLordX]

eDRAM has much better latency

Better than what? Intel's Comet Lake DDR4 controller could hit latency like that. So could Coffee Lake.

 

[JoeRambo]

TDP is 105W and PPT is 142W.

So the CPU can get up to 135% of the TDP, that is 142W.

In the case of Mark his CPU use 103% out of 135% of the PPT, so his 110W is right.

Please enlighten us if 110W includes SOC power and not. And if it does, please provide your "math" how 103% of whatever your calculations includes 110 + 23W of SOC?

Hint, Ryzen Master tooltip for "110W" part of Your calculations looks like this:


And just look how Package Power is described in HwInfo64 ( and how closely estimate is tracking PPT ):



So for anyone not using troll level of math, I will repeat:

Mark's CPU is using 146W (142W*1.03) of power at the socket, that is the value that is comparable to PL1/PL2 limits long term for Intel's CPUs and not what is indicated in "CPU-POWER" field there.
AMD is rising 142W value to 230W, so they will have 60+% of extra power to play with in certain SKUs.