Discussion Speculation: Zen 4 (EPYC 4 "Genoa", Ryzen 7000, etc.)

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Vattila

Senior member
Oct 22, 2004
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Except for the details about the improvements in the microarchitecture, we now know pretty well what to expect with Zen 3.

The leaked presentation by AMD Senior Manager Martin Hilgeman shows that EPYC 3 "Milan" will, as promised and expected, reuse the current platform (SP3), and the system architecture and packaging looks to be the same, with the same 9-die chiplet design and the same maximum core and thread-count (no SMT-4, contrary to rumour). The biggest change revealed so far is the enlargement of the compute complex from 4 cores to 8 cores, all sharing a larger L3 cache ("32+ MB", likely to double to 64 MB, I think).

Hilgeman's slides did also show that EPYC 4 "Genoa" is in the definition phase (or was at the time of the presentation in September, at least), and will come with a new platform (SP5), with new memory support (likely DDR5).



What else do you think we will see with Zen 4? PCI-Express 5 support? Increased core-count? 4-way SMT? New packaging (interposer, 2.5D, 3D)? Integrated memory on package (HBM)?

Vote in the poll and share your thoughts!
 
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Mopetar

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Jan 31, 2011
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I don't think the mobile market in general has a lot of demand for more cores over having fewer, but higher performance cores.

If AMD did use Zen 4c it would be to build a smaller overall die as opposed to providing more cores.
 

Timorous

Golden Member
Oct 27, 2008
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Since Zen4c is on 4nm and Phoenix Point is on 4nm.
Doesn't that mean that it's likely that the mobile market wil get Zen4c instead of Zen4?

Since zen 4c is just zen 4 on a density optimised node with less L3 cache all the APUs technically 'c' variants in a way.
 

NostaSeronx

Diamond Member
Sep 18, 2011
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Zen4c has so far only been attributed to lower-density higher performance node.
"The Zen 4c chiplet, according to AMD, is built on an HPC variant of TSMC N5."

First iteration is on N5HPC (virtually built on N5HPC), then production iteration is on a tailored N4X variant(physically built on N4X).

HPC:
Wider Cell CPP
Wider Cell Height
Wider Metal Pitch
Wider Metal Via

HPC != UHD/Improved HD

The biggest processor from a competitor in the Zen4c category is 128-cores at 5.7+ GHz within 950W TDP.
 
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moinmoin

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Jun 1, 2017
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Since Zen4c is on 4nm and Phoenix Point is on 4nm.
Doesn't that mean that it's likely that the mobile market wil get Zen4c instead of Zen4?
That was my suggestion from the start, that Bergamo is an attempt to make the higher density mobile APU core designs available to the cloud server market (which at FAD AMD said to have the biggest TAM portion of the overall datacenter market). We will see whether this applies at all, only to the Zen core IP block (my pick), or even to a reusable chiplet die (a possibility again since the post-FAD press release).
 

eek2121

Diamond Member
Aug 2, 2005
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Since Zen4c is on 4nm and Phoenix Point is on 4nm.
Doesn't that mean that it's likely that the mobile market wil get Zen4c instead of Zen4?

Zen4c is said to NOT be coming to desktop or mobile parts.

Sure, AMD could certainly change their minds, but it was originally only to be used with specific EPYC SKUs that target the big cloud providers.
 

SteinFG

Senior member
Dec 29, 2021
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Since Zen4c is on 4nm and Phoenix Point is on 4nm.
Doesn't that mean that it's likely that the mobile market wil get Zen4c instead of Zen4?
If I remember the rumors, all Zen4 variants are 8-core CCXs, but the difference is in the cache size
L3 per ccxL2 per core
Zen 4 chiplet321
Zen 4c chiplet162
Zen 4 on mobile161
 
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Timorous

Golden Member
Oct 27, 2008
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We've gotten no such confirmation on what Zen 4c actually is.

On an older slide it says 5nm but that could be 5nm family which 4nm is part of I believe. (Like 7nm and 6nm).

I did misremember the slide though, it says density optimised cache hierarchy, got my wires crossed on that.
 

maddie

Diamond Member
Jul 18, 2010
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On an older slide it says 5nm but that could be 5nm family which 4nm is part of I believe. (Like 7nm and 6nm).

I did misremember the slide though, it says density optimised cache hierarchy, got my wires crossed on that.
Crazy thought. Could AMD be customizing the "FinFlex" tech to be used on an AMD 4nmn?
 

SteinFG

Senior member
Dec 29, 2021
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Crazy thought. Could AMD be customizing the "FinFlex" tech to be used on an AMD 4nmn?
most likely not.
1) tsmc just announced it;
2) they specifically mentioned that it's on N3;
3) it's not a "density optimized cache", it's "density optimized cache hierarchy", basically they cut L3 in half to improve density, and with that, improve core per wafer output.
 

Mopetar

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Jan 31, 2011
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Zen4c is said to NOT be coming to desktop or mobile parts.

Sure, AMD could certainly change their minds, but it was originally only to be used with specific EPYC SKUs that target the big cloud providers.

Unless they know they need it to compete against Intel they have no reason to announce the possibility of any kind of mobile or desktop Zen 4c parts because it would commit them to releasing them at some point and could hurt sales of Zen 4 if a lot of people are willing to hold out.

Raptor Lake will give Intel a 32-thread competitor to square up against AMD. If they're able to pull ahead of AMD across most workloads, we're likely to see an AMD response because they can have a desktop Zen 4c part out well before Zen 5 will be ready.
 

Thibsie

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Apr 25, 2017
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Raptor Lake will give Intel a 32-thread competitor to square up against AMD. If they're able to pull ahead of AMD across most workloads, we're likely to see an AMD response because they can have a desktop Zen 4c part out well before Zen 5 will be ready.

Maybe. My understanding was that Zen5 would come quite quickly after Zen4.
 

LightningZ71

Golden Member
Mar 10, 2017
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The biggest question in my mind is how good the SMT threads on ZEN4 work out to be at around 4.3-4.5ghz. if we get very optimistic and assume that SMT2 adds about 30% throughput on the ZEN4 core, then we need to ask, is a ZEN4 core at around 1.5ghz worth a goldmont core at 3.8 ghz? I tend to doubt it, but, we also know that the goldmont clusters have throughput constraints due to the shared L2 cache that may impact things as well.

We know that the 12900k could surpass the 5900x and sometimes get close to the 5950x in MT benchmarks. We know that the 7950x is expected to gain a lot of clockspeed from the N5 process, have less memory pressure due to having DDR5, and has modest IPC improvements. Will all that be enough to keep a lead on a what is essentially a slightly faster 12900k with an additional 8 e cores and a little extra cache on the same process with the same socket limits for power?
 
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nicalandia

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Jan 10, 2019
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The biggest question in my mind is how good the SMT threads on ZEN4 work out to be at around 4.3-4.5ghz. if we get very optimistic and assume that SMT2 adds about 30% throughput on the ZEN4 core, then we need to ask, is a ZEN4 core at around 1.5ghz worth a goldmont core at 3.8 ghz? I tend to doubt it, but, we also know that the goldmont clusters have throughput constraints due to the shared L2 cache that may impact things as well.

We know that the 12900k could surpass the 5900x and sometimes get close to the 5950x in MT benchmarks. We know that the 7950x is expected to gain a lot of clockspeed from the N5 process, have less memory pressure due to having DDR5, and has modest IPC improvements. Will all that be enough to keep a lead on a what is essentially a slightly faster 12900k with an additional 8 e cores and a little extra cache on the same process with the same socket limits for power?
Zen4c will clock at least 2.5 Ghz no question about that. Also Perhaps Intel will enable HT on those Goldmont cores perhaps even SMT4, it only cost them about 10% die area for a 25%+ performance boost.


7950X will have not trouble Matching and exceeding the 13900K at stock speed while about the same price.
 

DisEnchantment

Golden Member
Mar 3, 2017
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Maybe. My understanding was that Zen5 would come quite quickly after Zen4.
Zen 5 looks to me like it will launch on Mobile/Strix Point first. I guess AMD will try to fit Strix Point to launch with OEM laptop refresh window in 2024Q1/Q2. Also RDNA3+ makes sense since it would be much earlier than when RDNA4 would be ready, which would come later in the year.
I am convinced Strix Point will be on N4, because of higher wafer capacity (F18P1/2/3/4 and Arizona F21 coming online in 2024 too), cheaper than N3 therefore more suitable for low margin mobile SoCs. Efficiency wise N4P is quite close to N3.
 

Ajay

Lifer
Jan 8, 2001
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I think 3D will be released pretty close to the regular one, maybe a couple of months later. Maybe the will simply see how well Raptor lake performs, and if needed they will release it sooner rather than later, otherwise postpone the launch.
Doubtful. AMD won't want to cannibalize their own product line so quickly.
 

Ajay

Lifer
Jan 8, 2001
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3D variants (if any more than 7800X3D) will be premium products with a premium price on top of the regular variants. FAD talks mentioned both are scheduled for this year.
Yes, I understand that, but why 'refresh' your won product after two months? I guess if Raptor Lake is really good, Zen4-3D will come out faster.
 

NostaSeronx

Diamond Member
Sep 18, 2011
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That is Wrong. Zen4C is HIGH Density not lower..
Zen4c is HPC, of which HPC has:
Wider poly pitch
Wider cell height
Wider metal pitch
Wider metal vias

The high density isn't from the libs, but rather from the macros/tiles.
Library = Less Dense
Architecture = More Dense

Same ISA;
Zen4 = Full 512-bit rate
Zen4c = Half 512-bit rate
 
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