Discussion Speculation: Zen 4 (EPYC 4 "Genoa", Ryzen 7000, etc.)

[Vattila]

Except for the details about the improvements in the microarchitecture, we now know pretty well what to expect with Zen 3.

The leaked presentation by AMD Senior Manager Martin Hilgeman shows that EPYC 3 "Milan" will, as promised and expected, reuse the current platform (SP3), and the system architecture and packaging looks to be the same, with the same 9-die chiplet design and the same maximum core and thread-count (no SMT-4, contrary to rumour). The biggest change revealed so far is the enlargement of the compute complex from 4 cores to 8 cores, all sharing a larger L3 cache ("32+ MB", likely to double to 64 MB, I think).

Hilgeman's slides did also show that EPYC 4 "Genoa" is in the definition phase (or was at the time of the presentation in September, at least), and will come with a new platform (SP5), with new memory support (likely DDR5).

What else do you think we will see with Zen 4? PCI-Express 5 support? Increased core-count? 4-way SMT? New packaging (interposer, 2.5D, 3D)? Integrated memory on package (HBM)?

Vote in the poll and share your thoughts!

 

[Bigos]

On Linux, glibc is a dynamic library that is almost always provided by the distro. So this just has to be released and then picked up by a distro for the applications to see the benefit.

 

[moinmoin]

Glibc Picks Up More AVX-512 Optimizations - ~30% Less Cycles For Some String Functions - Phoronix

Zen 4 will extend its lead in Linux even more when more applications are compiled with the updated glibc library.

Contributed by Intel through an Intel developer no less.

 

[igor_kavinski]

Contributed by Intel through an Intel developer no less.

Bu ironically, it will help Zen 4 more

Intel is doing all this hard work for their enterprise customers but they also lose workstation sales when lots of developers may use Zen 4 with ECC RAM and avoid the Intel enterprise tax.

 

[LightningZ71]

It does depend a bit. The AVX-512 implementations are somewhat different internally between Intel cores and Zen4. Certain instructions have higher latencies on Zen4, and VCompress looks to be best avoided unless you have a specific target for it in mind. I am initially suspicious that Intel will have chosen the compile paths that most benefit their implementation and most harm AMD's and would be interested in seeing a code audit. I'm not saying that this actually happened, only that it's possible and I am suspicious about the source.

 

[nicalandia]

This should be Easy..

 

[Hitman928]

This should be Easy..

View attachment 69526

You don't even need a belt sander, just some elbow grease and time, lol.

 

[nicalandia]

You don't even need a belt sander, just some elbow grease and time, lol.

In the old days was called CPU Lapping..!

 

[Mopetar]

In the old days was called CPU Lapping..!

View attachment 69527

We even had threads about it: http://www.portvapes.co.uk/?id=Latest-exam-1Z0-876-Dumps&exid=threads/lapping-sandy-bridge.2137075/

 

[nicalandia]

We even had threads about it: http://www.portvapes.co.uk/?id=Latest-exam-1Z0-876-Dumps&exid=threads/lapping-sandy-bridge.2137075/

Who would of thought.. What was Old is NEW Again?

 

[HurleyBird]

Funny how AMD skyrockets power consumption for a few %, and then just casually gives up a few % by making the IHS too thick.

 

[TESKATLIPOKA]

ComputerBase made a comparison table of MT performance.

Raptor does a very good job at 45W, I am especially surprised about 13900K.
This table confirmed AMD will be more efficient in laptops, but that was expected.
Within 45W there is not a good reason to go for more than 8C from AMD. For a 16C you will need 65-88W TDP to unleash Its true potential.

 

[DisEnchantment]

Raptor does a very good job at 45W.
This table confirmed AMD will be more efficient in laptops, but that was expected.
Within 45W there is not a good reason to go for more than 8C from AMD. For a 16C you will need 65-88W TDP to unleash Its true potential.

You should check core power in Raphael, the interconnect and cIOD consume a chunk of 45W.
Which means for monolithic and specifically for Phoenix with N4 it will be way better.

AMD need to move to a different interconnect like SoIC, HBI, EFB etc. The efficiency is one order of magnitude vs GMI.

 

[Markfw]

You should check core power in Raphael, the interconnect and cIOD consume a chunk of 45W.
Which means for monolithic and specifically for Phoenix with N4 it will be way better.

12-13 watt per my Ryzen master.

 

[TESKATLIPOKA]

You should check core power in Raphael, the interconnect and cIOD consume a chunk of 45W.
Which means for monolithic and specifically for Phoenix with N4 it will be way better.

I know, that's why I said AMD will be better. Did anyone make a comparison?
I hope we will see Phoenix at CES 2023.

12-13 watt per my Ryzen master.

Thanks.

 

[HurleyBird]

Raptor does a very good job at 45W, I am surprised.
This table confirmed AMD will be more efficient in laptops, but that was expected.
Within 45W there is not a good reason to go for more than 8C from AMD. For a 16C you will need 65-88W TDP to unleash Its true potential.

Phoenix is obviously going to be most efficient x86 laptop chip, and the chip that most people will want. 45+W laptop CPUs are dumb imho, but the table suggests AMD loses at 45W and wins at 65W. The big question for Dragon Range is going to be idle consumption.

 

[TESKATLIPOKA]

Isn't Dragon Range just a renamed Raphael?
I hope Phoenix doesn't have only 1/2 of L3 cache.

 

[Hitman928]

In the old days was called CPU Lapping..!

View attachment 69527

In the even older days there was no IHS to lap, so you focused on the heat sink. Thermal pastes weren’t as good back then though.

 

[HurleyBird]

Isn't Dragon Range just a renamed Raphael?

Yes.

I hope Phoenix doesn't have only 1/2 of L3 cache.

I hope that there's shared L3 between CPU and GPU, in which case the larger the cache the better, but assuming there isn't, I'd probably prefer transistors go to a bigger GPU than more cache. More cache would be nice, but it takes up a good chunk of die area so it depends what the tradeoff is. If the tradeoff is only to AMD's margins, then sure.

 

[biostud]

Yes.



I hope that there's shared L3 between CPU and GPU, in which case the larger the cache the better, but assuming there isn't, I'd probably prefer transistors go to a bigger GPU than more cache. More cache would be nice, but it takes up a good chunk of die area so it depends what the tradeoff is. If the tradeoff is only to AMD's margins, then sure.

It will be interesting to see if 3D cache will be part of high end APU’s

 

[yuri69]

AMD need to move to a different interconnect like SoIC, HBI, EFB etc. The efficiency is one order of magnitude vs GMI.

Zen 4 staying on SerDes contributes to its "overclocked Zen 3 + minor tweaks" image.

Both Zen 4-based server and client (!) were rumored to use a fan out packaging. https://www.semianalysis.com/p/advanced-packaging-part-2-review

 

[Markfw]

I know, that's why I said AMD will be better. Did anyone make a comparison?
I hope we will see Phoenix at CES 2023.

Thanks.

To be clear. Thats what is says for SOC power. Its 23 watts on 5950x, and 12-13 on 7950x.

Edit: that was answering this:
You should check core power in Raphael, the interconnect and cIOD consume a chunk of 45W.
Which means for monolithic and specifically for Phoenix with N4 it will be way better.

 

[HurleyBird]

It will be interesting to see if 3D cache will be part of high end APU’s

Doubt Phoenix has it, but it's probably only a matter of time. Looking at what AMD is doing with RDNA3 and other products, I wouldn't be surprised if Strix Point (Zen 5 APU) had stacked cache, and I'd be a bit surprised if there wasn't a stacked cache APU by Zen 6.

 

[DisEnchantment]

To be clear. Thats what is says for SOC power. Its 23 watts on 5950x, and 12-13 on 7950x.

Edit: that was answering this:
You should check core power in Raphael, the interconnect and cIOD consume a chunk of 45W.
Which means for monolithic and specifically for Phoenix with N4 it will be way better.

My 7950X still shows 23W on SoC Power on Windows.



AMD started upstreaming new Framework for monitoring now, will start tinkering with it once available, atm Linux SMU KO is not reliable for Zen 4.

 

[Tuna-Fish]

Funny how AMD skyrockets power consumption for a few %, and then just casually gives up a few % by making the IHS too thick.

Yeah, I can see the attraction in being compatible with older heatsinks, but that was still a bad call, IMO. If the only difference is height, the heat sink makers would not have much trouble at all in making compatibility kits.

 

[LightningZ71]

It makes you wonder how an 8 core Rembrandt APU would do at 45 and 65 watts in the same test with the same RAM...