Discussion Speculation: Zen 4 (EPYC 4 "Genoa", Ryzen 7000, etc.)

[Vattila]

Except for the details about the improvements in the microarchitecture, we now know pretty well what to expect with Zen 3.

The leaked presentation by AMD Senior Manager Martin Hilgeman shows that EPYC 3 "Milan" will, as promised and expected, reuse the current platform (SP3), and the system architecture and packaging looks to be the same, with the same 9-die chiplet design and the same maximum core and thread-count (no SMT-4, contrary to rumour). The biggest change revealed so far is the enlargement of the compute complex from 4 cores to 8 cores, all sharing a larger L3 cache ("32+ MB", likely to double to 64 MB, I think).

Hilgeman's slides did also show that EPYC 4 "Genoa" is in the definition phase (or was at the time of the presentation in September, at least), and will come with a new platform (SP5), with new memory support (likely DDR5).

What else do you think we will see with Zen 4? PCI-Express 5 support? Increased core-count? 4-way SMT? New packaging (interposer, 2.5D, 3D)? Integrated memory on package (HBM)?

Vote in the poll and share your thoughts!

 

[Kaluan]

Yeah, if you do rough calculation of GPU die size based on SP, it is around half of the size of PHX's GPU area. We don't know the exact die size of 2P+4E with 8MB L3, but should be half of PHX's CPU as well...

It should be less than 33mm2.

Zen4 cores seem to be identical logic and SRAM structures across the board, be them inside chiplet Raphael/Genoa, chiplet Bergamo or monolithic(?) Phoenix or "PHX2" (both Zen4 and "Zen4C"). The wildcard in relation to size and (per core) clocking/efficiency characteristics only seems to be the node they're on and how AMD ported them.

Does anyone know the Zen3+ (Rembrandt, N6) core size vs Zen3 (Cezanne/Barcelo, N7P)?

 

[BorisTheBlade82]

PHX2 can't be monolithic, If It has Zen4 + Zen4c. Another thing is CCX.
Zen3,4 had a single 8core CCX, now we will have 2 pairs? One with 2 cores and the second with 4?
6 Zen 4 would do the same job without using up a lot of extra space.

Why not monolithic? IMHO there is no reason it couldn't.
The CCX are giving me headaches as well. For this SKU to fly they need to design a new 2c Zen4 CCX as well as a 4c Zen4c CCX. Hard to believe that this is worth it.
Also as @moinmoin pointed out the differences between the two categories seem to be rather small (frequency being the big unknown).

 

[TESKATLIPOKA]

Why not monolithic? IMHO there is no reason it couldn't.

Zen 4c supposedly uses denser libraries, that's why It achieves only lower clocks.
How can you make a single die with different libraries?

 

[BorisTheBlade82]

Zen 4c supposedly uses denser libraries, that's why It achieves only lower clocks.
How can you make a single die with different libraries?

IIRC TSMC promotes exactly this - using HP and HD Libs on the same die.

 

[TESKATLIPOKA]

IIRC TSMC promotes exactly this - using HP and HD Libs on the same die.

Isn't that for N3?

 

[Exist50]

That's the part about the "Big" and "Little" Phoenix leak that confuses me so far:
Previous mobile APUs never had the normal Zen cores but ones with significantly higher density and L3$ cut in half. That's what I expected Zen 4c to be about.

I don't think the previous Zen implementations in mobile have had any significant (if any) differences vs the desktop implementations, minus the L3 differences. Zen 4c will have to be another matter entirely to cut the area in half. But I doubt architecture changes (like halving the FPU) are on the table. Wouldn't really work with AVX-512 anyways.

 

[LightningZ71]

[I'm vastly over simplifying this]

On the same die, even when constricted to one uniform design library, there are still different cell types with different densities, different cell and circuit padding rules, different leakages and different switching rates. Some of this is controlled with cell heights and others are controlled by the dark silicon that's left between each transistor.

It is possible that AMD is implementing a 2 core CCX based on a high performance and moderate leakage cell library that optimizes for performance over density and power and then a quad core CCX that uses a slower, higher density cell library that is optimized for low power use and accepts lower performance targets. These are cell libraries that live within the overarching process design library. For each process, as we know, there are different sets of design libraries available to choose from. Each of those design libraries defines the process lithography rules and includes a set of defined cell libraries. Each die is a collection of cells such as cpu cores, SRAM, I/O, gpu functional units, etc.

The innovation that TSMC was touting is the ability to use different die design rules on the same die in different areas, increasing cell type and performance flexibility.

Perhaps the C in Zen4C indicates that they chose high density cell libraries and use a different core circuit layout as a result of the different cell design rules involved, but it retains effectively the same logic layout and capabilities of regular Zen4.

 

[BorisTheBlade82]

Isn't that for N3?

Yep, maybe I failed to remember correctly 😉

 

[turtile]

Why not monolithic? IMHO there is no reason it couldn't.
The CCX are giving me headaches as well. For this SKU to fly they need to design a new 2c Zen4 CCX as well as a 4c Zen4c CCX. Hard to believe that this is worth it.
Also as @moinmoin pointed out the differences between the two categories seem to be rather small (frequency being the big unknown).

Zen 4 and Zen 4c are on different nodes. So there is no way they can do this without shrinking Zen 4. And Zen 4c uses 8 core CCXs according to the rumors. Zen 5 and Zen 5c are on different nodes as well. So technically, Zen 5 and Zen 4c could be on the same die (both 4N). I'm not sure that they would do this because the ISA is different.

 

[BorisTheBlade82]

Zen 4 and Zen 4c are on different nodes. So there is no way they can do this without shrinking Zen 4. And Zen 4c uses 8 core CCXs according to the rumors. Zen 5 and Zen 5c are on different nodes as well. So technically, Zen 5 and Zen 4c could be on the same die (both 4N). I'm not sure that they would do this because the ISA is different.

Maybe you are a bit late to the party. The current rumour is that there will indeed be a 2xZen4+4xZen4c low-cost/low-power SKU. And if that comes to life I am pretty confident that it's going to be monolithic.

 

[turtile]

Maybe you are a bit late to the party. The current rumour is that there will indeed be a 2xZen4+4xZen4c low-cost/low-power SKU. And if that comes to life I am pretty confident that it's going to be monolithic.

I'm aware of that. While I agree that AMD will do monolithic for all low-end processes because it's not worth the cost-benefit, the rumor itself makes no sense. The only way Zen 4 and Zen 4 c can be together is by two different chiplets. I can only see this happening if Samsung offered 3nm for super cheap and it was worth porting.

 

[scineram]

This is all just mouthbreathing at this point. We need to put down $10 behind whether this stupid rumour will hold.

 

[LightningZ71]

The rumor isn't necessarily stupid. There is a bit of merit to the rumored approach. A quad of density/power optimized Zen4c combined with a pair of performance optimized Zen4 cores would compete well with Intel's 2p+8e die, such as exists in the 1235/1255u products that are saturating the market right now. A 2 WGP RDNA3 iGPU with high clocks would perform adequately against an 80/96 eu Xe iGPU running at half the clocks. Throw in having it on N4 (which I feel is a stretch, would expect N5, but, it would be tiny on N4) and it would likely outpace the 1235/1255 in ST and stay with it in MT in most cases and easily outpace it in AVX-512 code (vs alternate code paths) that it would retain compatibility with.

With the support for hybrid architectures being present in Windows 11, it would be odd to not take advantage of it. I also think that both Intel and AMD see the competition that Apple is offering with the M series, especially in mobile, and I think that they are both taking steps to make sure that they can stay in that race. An N4 mobile Zen4 can easily hang with the M2 in ST when presented with good code. A 12 thread hybrid PHX2 should easily keep ahead of the fewer thread M2 in MT tasks. Power draw should be broadly similar when adjusted for actual work done.

 

[eek2121]

AMD has stated directly that Zen4c is cloud only. Go look it up.

It is not coming to desktop, mobile, or HEDT.

It is using a density optimized process that won’t hit higher clocks.

Could AMD change their minds? Of course. However we have seen no evidence of this. Just a few forum members here pushing for it.


In other news, The 7950X (along with the other chips) is rumored to be getting a 192mb X3D variant with similar clocks . Take that with a grain of salt. Source:

https://twitter.com/x/status/1598721773037551617

Huge, if true. My wallet is going to hate me again next year.

 

[Exist50]

AMD has stated directly that Zen4c is cloud only. Go look it up.

Not seeing anything. Do you have a link?

 

[TESKATLIPOKA]

Notebookcheck.net tested Ryzen 9 7950X and Ryzen 7 7700X.
Here is score in CB R15 at ECO modes with actual clockspeed.






At 4.8GHz a single core consumes ~9.625W.
At 4GHz a single core consumes ~4.8W.
I subtracted 13W from package power and that's how I got power per core after dividing it by the number of cores.

 

[Shamrock]

Another grain of salt, but there is a graph (scroll down to Quasarzone), it compares the 7950x to the 7950x3d. "supposedly" 37% faster. Completely murderlizes the 13900k, as well.

AMD Ryzen 9 7950X3D Coming in Jan 2023: 30% Faster than the Intel Core i9-13900K, Courtesy of ~200MB Cache [Rumor] | Hardware Times

The Ryzen 9 7900X3D will feature 16 cores with two 64MB cache dies or a single denser cache die with 128MB of SRAM.

www.hardwaretimes.com

 

[Exist50]

Another grain of salt, but there is a graph (scroll down to Quasarzone), it compares the 7950x to the 7950x3d. "supposedly" 37% faster. Completely murderlizes the 13900k, as well.

AMD Ryzen 9 7950X3D Coming in Jan 2023: 30% Faster than the Intel Core i9-13900K, Courtesy of ~200MB Cache [Rumor] | Hardware Times

The Ryzen 9 7900X3D will feature 16 cores with two 64MB cache dies or a single denser cache die with 128MB of SRAM.

www.hardwaretimes.com

Given how far off the 5800x3d numbers are there compared to typical results, seems like more than a grain of salt is warranted.

 

[Markfw]

Given how far off the 5800x3d numbers are there compared to typical results, seems like more than a grain of salt is warranted.

Considering how the 7950x absolutely kills the 5950x, and double the cache from the 5800x3d, I would believe anything from this processor. Look at Milan-x ???? (I want one of those)

 

[carrotmania]

Given how far off the 5800x3d numbers are there compared to typical results, seems like more than a grain of salt is warranted.

What?
The 5800X3D results are ~20%, ~28% and ~40% over a standard 5800X. The 40% game is probably F1 or FS21, and there are plenty of other games where X3D gets 20-25% over an X.

I'm not saying these results are legit, but your reasoning is reasonable. Unsurprisingly.

 

[Exist50]

Considering how the 7950x absolutely kills the 5950x, and double the cache from the 5800x3d, I would believe anything from this processor. Look at Milan-x ???? (I want one of those)

The Zen 4 baseline increase would already have been accounted for. And it's only double the cache for double the core count config, so that doesn't really change anything on a per core basis. Gaming should mostly stay on one CCX anyway. Nor would double the cache even per core result in double the performance.

What?
The 5800X3D results are ~20%, ~28% and ~40% over a standard 5800X. The 40% game is probably F1 or FS21, and there are plenty of other games where X3D gets 20-25% over an X.

I'm not saying these results are legit, but your reasoning is reasonable. Unsurprisingly.

Most gaming benchmarks show an average of about 15% for the 5800X3D vs the 5800X, so where are these numbers coming from? At best, they're cherry picked outliers that are worthless for a meaningful discussion. At worst, they're complete nonsense.

 

[BorisTheBlade82]

Most gaming benchmarks show an average of about 15% for the 5800X3D vs the 5800X, so where are these numbers coming from? At best, they're cherry picked outliers that are worthless for a meaningful discussion. At worst, they're complete nonsense.

These numbers aren't stock comparisons of 5800X vs. 3D - they are at normalised 4,4Ghz frequency, increasing the relative advantage. The reasoning being that the frequency gap will be much less this time.

 

[Markfw]

The Zen 4 baseline increase would already have been accounted for. And it's only double the cache for double the core count config, so that doesn't really change anything on a per core basis. Gaming should mostly stay on one CCX anyway. Nor would double the cache even per core result in double the performance.

Most gaming benchmarks show an average of about 15% for the 5800X3D vs the 5800X, so where are these numbers coming from? At best, they're cherry picked outliers that are worthless for a meaningful discussion. At worst, they're complete nonsense.

Again, you only speak for some people, not the DC community. The upcoming project (tomorrow) would be killer if both ccds' had 96m cache. See the DC forum for details, but stop speaking for everyone.

 

[biostud]

The Zen 4 baseline increase would already have been accounted for. And it's only double the cache for double the core count config, so that doesn't really change anything on a per core basis. Gaming should mostly stay on one CCX anyway. Nor would double the cache even per core result in double the performance.

Most gaming benchmarks show an average of about 15% for the 5800X3D vs the 5800X, so where are these numbers coming from? At best, they're cherry picked outliers that are worthless for a meaningful discussion. At worst, they're complete nonsense.

The question is, as I see it, which types of games see the most uplift. Personally I don’t find it very important that games like CS:GO, and other older games that are really not that bottlenecked don’t see any improvement. On the other hand when a cpu bound modern game see a uplift 30-40% then it is pretty significant, even though the average over several games is only 15%.

 

[eek2121]

Not seeing anything. Do you have a link?

Not handy, if I get bored I may go find it. There are at least 2 videos where it is stated.