Discussion Speculation: Zen 4 (EPYC 4 "Genoa", Ryzen 7000, etc.)

[Vattila]

Except for the details about the improvements in the microarchitecture, we now know pretty well what to expect with Zen 3.

The leaked presentation by AMD Senior Manager Martin Hilgeman shows that EPYC 3 "Milan" will, as promised and expected, reuse the current platform (SP3), and the system architecture and packaging looks to be the same, with the same 9-die chiplet design and the same maximum core and thread-count (no SMT-4, contrary to rumour). The biggest change revealed so far is the enlargement of the compute complex from 4 cores to 8 cores, all sharing a larger L3 cache ("32+ MB", likely to double to 64 MB, I think).

Hilgeman's slides did also show that EPYC 4 "Genoa" is in the definition phase (or was at the time of the presentation in September, at least), and will come with a new platform (SP5), with new memory support (likely DDR5).

What else do you think we will see with Zen 4? PCI-Express 5 support? Increased core-count? 4-way SMT? New packaging (interposer, 2.5D, 3D)? Integrated memory on package (HBM)?

Vote in the poll and share your thoughts!

 

[nicalandia]

7600X vs 5800X3D vs 12900K Linux gaming



7600X vs 5800X3D Linux gaming

 

[igor_kavinski]

This particular graph would make an owner of one of these AMD CPUs really proud.

 

[coercitiv]

I was was wondering about the pricing of the motherboards, and if the rumors are true that it is the high requirements for power delivery that makes the boards more expensive than previous generations.

As far as I can tell, it's a combination of three factors:

• power requirements going up through both higher TDP and also higher current (since voltage goes down gen over gen)
• data signaling paths becoming more complex both in terms of speed and number: faster PCIe standards and more lanes overall, faster memory speed, all this requires manufacturers to increase PCB layer count.
• mobo manufactuers want a taste of the high margins some vendors get in the PC gaming industry

Should AMD make a "B630" that had same features as the B650, but did not support the most power demanding CPUs, so that the entry level for AM5 could be lower or do you think the A series will be enough, when they are launched?

Nope. Prices will come down in time, until them the market knows not to overspend on DDR5, Ryzen 7000 and expensive new motherboards:

https://videocardz.com/newz/amd-ryz...zen-5-7600x-ryzen-9-7950x-again-drops-to-e599

According to this data, AMD has been selling 91 units of Ryzen 5 5600X each day. That’s significantly more (4.2x) than 7600X which averages at 21.7 units. The sales have slightly kicked off after AMD lowered the price for 7600X, but it is still nowhere near as popular as the predecessor. Another interesting way to look at this data, a total number of AMD’s 8-core Ryzen 7 5700X CPUs sold (released April 20th) nearly matches the whole Ryzen 7000 series combined.

 

[DrMrLordX]

This particular graph would make an owner of one of these AMD CPUs really proud.

Hmm. Are the e-cores causing problems for the 12900k here?

 

[igor_kavinski]

Hmm. Are the e-cores causing problems for the 12900k here?

We'll need an enterprising 12900K user on these forums running that game to find out!

Carfax83 could do it with his RPL CPU, if he so wishes, for the AT community

 

[Kocicak]

7600X vs 5800X3D vs 12900K Linux gaming

Who cares about 12900K, this is an old CPU with active successor, 5800X3D is about to be pensioned as well.

 

[nicalandia]

Hmm. Are the e-cores causing problems for the 12900k here?

Linux and Intel just don't "Play" Nice in gaming... Also notice how those games are not Taking Advantage of the Stack L3

 

[DrMrLordX]

Linux and Intel just don't "Play" Nice in gaming... Also notice how those games are not Taking Advantage of the Stack L3

That doesn't really explain why, though.

 

[Rigg]

Who cares about 12900K, this is an old CPU with active successor, 5800X3D is about to be pensioned as well.

old???

 

[nicalandia]

That doesn't really explain why, though.

Overall, AMD CPUs perform better in Linux than Windows in computational and in games. Seems like it's down to drivers.

 

[DrMrLordX]

Overall, AMD CPUs perform better in Linux than Windows in computational and in games. Seems like it's down to drivers.

Doesn't really explain why the 5800X3D is gaining nothing in those tests, though.

 

[Mopetar]

Doesn't really explain why the 5800X3D is gaining nothing in those tests, though.

It tells us that the things being tested can almost entirely fit within L2. It's the result you get for anything like that where the extra cache does practically nothing, but the extra clock speed can increase performance.

Not every game or every application gets use out of extra L3 cache.

 

[nicalandia]

8 Core Linux Core-Latency Test.

7700X vs Older Rryzen(No result was found for the 5800X) and Intel 9900K



8 Core Latency Linux Test

 

[Carfax83]

We'll need an enterprising 12900K user on these forums running that game to find out!

Carfax83 could do it with his RPL CPU, if he so wishes, for the AT community

1) Linux? Ewwwww!
2) Pure strategy games are boring to me
3) There is likely some efficiency core shenanigans going on there though, based on that performance gap

 

[moinmoin]

3) There is likely some efficiency core shenanigans going on there though, based on that performance gap

There isn't yet, i.e. Intel's Thread Director shenanigans haven't made it into Linux yet as work on it is still ongoing:

Intel Advances Linux "IPC Classes" Design To Improve Load Balancing For Hybrid CPUs - Phoronix

www.phoronix.com

 

[BorisTheBlade82]

There isn't yet, i.e. Intel's Thread Director shenanigans haven't made it into Linux yet as work on it is still ongoing:

Intel Advances Linux "IPC Classes" Design To Improve Load Balancing For Hybrid CPUs - Phoronix

www.phoronix.com

Thanks for sharing.
What I still do not understand is this: Since we already have up to three IPC/performance classes in ARM CPUs, there must have been some kind of support in the Kernel for years. What makes Intel's CPUs so special that they need something else?

 

[DrMrLordX]

Thanks for sharing.
What I still do not understand is this: Since we already have up to three IPC/performance classes in ARM CPUs, there must have been some kind of support in the Kernel for years. What makes Intel's CPUs so special that they need something else?

One possible reason is ISA support. Even "small" cores on modern ARM SoCs support Neon, and on SoCs that support/will support SVE2, all the cores will support that as well. Intel seems to have at least flirted with the idea of having AVX512 on their Golden Cove cores, which was later completely disabled for consumer parts (and for Raptor Cove consumer parts as well).

 

[BorisTheBlade82]

One possible reason is ISA support. Even "small" cores on modern ARM SoCs support Neon, and on SoCs that support/will support SVE2, all the cores will support that as well. Intel seems to have at least flirted with the idea of having AVX512 on their Golden Cove cores, which was later completely disabled for consumer parts (and for Raptor Cove consumer parts as well).

As you point out, they settled on the ISA subset that all of their cores support - so nothing special in this regard.

Furthermore in the ARM space there is exactly what you describe: SoCs, where only a subset of the cores is able to execute 32bit code. So they even already mastered what Intel still could not achieve with their second generation.

 

[DrMrLordX]

As you point out, they settled on the ISA subset that all of their cores support - so nothing special in this regard.

It was after the full silicon release, though. They disabled AVX512 through firmware.

 

[BorisTheBlade82]

It was after the full silicon release, though. They disabled AVX512 through firmware.

I know I know. But again: Not only does ARM already have up to three IPC/Perf classes, but also different ISAs in one SoC as well, which is already supported at runtime by the Android Kernel.
So why the need for further implementations?

 

[igor_kavinski]

Furthermore in the ARM space there is exactly what you describe: SoCs, where only a subset of the cores is able to execute 32bit code. So they even already mastered what Intel still could not achieve with their second generation.

They could have gotten there faster if Otellini hadn't been dumb enough to turn down Apple for providing mobile chips for their iPhone.

 

[moinmoin]

Thanks for sharing.
What I still do not understand is this: Since we already have up to three IPC/performance classes in ARM CPUs, there must have been some kind of support in the Kernel for years. What makes Intel's CPUs so special that they need something else?

Intel wants to introduce this feature to increase overall peak performance. Previous implementations to support big.Little were all about power efficiency. Linux handles P/E cores very well in that regard, but you can't push for highest possible performance with the current approaches for which you need to know the peak performance each core could offer (calling that "IPC" in the patch set is highly unfortunate).

Afaik Android effectively does a lot of stuff in userland to handle hybrid designs, like setting process priorities and clamping CPU utilization, with the kernel offering the API but often not acting on its own:

[v4,00/16] Add utilization clamping support - Patchwork

But even Intel's implementation will need some userland part (like in the desktop environment, window manager etc.) to make good use of it as the information what process is in foreground or background still needs to be conveyed to the kernel somehow in the end.

 

[nicalandia]

Nice 10% Boost on Genoa with Linux Performance Governor



Genoa Performance With Performance Governor

 

[DrMrLordX]

I know I know. But again: Not only does ARM already have up to three IPC/Perf classes, but also different ISAs in one SoC as well, which is already supported at runtime by the Android Kernel.
So why the need for further implementations?

Not really sure they have different ISAs between cores in modern ARM cores. All the recent ARM cores have supported NEON, and in any SoC that supports SVE2, all the cores support SVE2. There were some hybrid 32 bit/64 bit chips and I have no idea how they handled that.

 

[BorisTheBlade82]

@DrMrLordX
Even the newest QC SD 8 Gen 2 has a 64bit only prime core, 2 64bit and 2 32bit Performance cores and another 3 32bit efficiency cores - mind blowing. But somehow this seems to work for 32bit apps at runtime.