Well guys, I guess we can se very interesting results here. If someone with a K8 1MB L2 runs the benchmark, report it, as my bet is that an FX-55 mildly overclocked will be the top gun.
Findings so far:
- SuperPI is very dependant on fast data transfer. Tons of bandwidth, low latency and big cache are key here. I was surprised to see a 2.0 GHz P-M doing poorly, as the P-M is a known monster for superpi. Well, then I realized this is the 32M test, not the 1M where the big cache of the P-M flies through the test.
- Low latency or bandwidth?: Depends on the architecture. Old-style designs (read, have a FSB) seem to be more affected by the bandwidth rather than the latency. For new designs (K8 ) they seem to be about equal.
- What is the most important factor for superpi?: Easy answer: CACHE. A P-M flies when the test fits nicely in the cache. Once main memory is involved, the P-M chokes because of the low data transfer capabilities (we have been stating this for months....) This is why also prescotts are getting now the top marks. I want to see the results of an emergency edition. This is also why a socket 754 K8 (I assume clawhamer with 1MB L2) was able to mostly keep up with the socket 939 babies. A socket 754 K8 with DDR550 running the memory at full speed should beat a socket 939 with DDR400. Can anyone confirm? Increasing the memory speed without increasing the HT link speed is preferred (K8 white papers are your friend here)
Keep reporting
Alex
Findings so far:
- SuperPI is very dependant on fast data transfer. Tons of bandwidth, low latency and big cache are key here. I was surprised to see a 2.0 GHz P-M doing poorly, as the P-M is a known monster for superpi. Well, then I realized this is the 32M test, not the 1M where the big cache of the P-M flies through the test.
- Low latency or bandwidth?: Depends on the architecture. Old-style designs (read, have a FSB) seem to be more affected by the bandwidth rather than the latency. For new designs (K8 ) they seem to be about equal.
- What is the most important factor for superpi?: Easy answer: CACHE. A P-M flies when the test fits nicely in the cache. Once main memory is involved, the P-M chokes because of the low data transfer capabilities (we have been stating this for months....) This is why also prescotts are getting now the top marks. I want to see the results of an emergency edition. This is also why a socket 754 K8 (I assume clawhamer with 1MB L2) was able to mostly keep up with the socket 939 babies. A socket 754 K8 with DDR550 running the memory at full speed should beat a socket 939 with DDR400. Can anyone confirm? Increasing the memory speed without increasing the HT link speed is preferred (K8 white papers are your friend here)
Keep reporting
Alex