Can you please point out what this has to do with this thread, or his post, because honestly I don't get it. Why do you change subject every now and then only to talk about Shintai?
ZEN architecture is not based on Bulldozer CMT but in SMT like Intels. Also each ZEN Core has 50% more execution resources (4x ALUs + 2x AGUs vs 2+2) than what Bulldozer Integer Core has.
The problem is not in the IPC, but if the architecture and the 14nm LPP process can achieve 4GHz or above at the designated TDP.
Whatever you say
Can't wait for Zen to arrive. I was on these forums when Derpdozer was being hyped to the moon and I will be sure not to miss the discussion when Zen ultimately turns out to be a disappointment.
What exactly does that mean? Is that a good thing?
We're not disappointed that you're finally off vacation from us. D:
Yes, it's a good thing. It means they didn't differentiate the AGUs and the AGUs can be used for any memory op. So, it can do two loads at the same time or two stores at the same time, or one of each. There were rumors that one was load-only and the other was store-only. I think it came from a misreading of the gcc patch (since the patch creates a znver1-load and znver1-store distinction... but when you look at the definition it is znver1_agu, which is defined as znver1_agu0 | znver1_agu1, meaning either unit can do either (I missed this until yesterday and believed the rumor until then)).
AGU Specialization is used to limit how many connections you need to make to an AGU and to reduce the complexity of handling multiple AGUs and generated addresses at once elsewhere in the design. Intel's Core chips (up until Sandy Bridge) used this design. AMD, however, has had full AGUs since the Phenom era, IIRC (a requirement of the clustered design), which was even considered one of their weak points against the Core architecture by some (entirely as a side-effect of the cluster design (1AGU + 1ALU attached to a queue, which complicated scheduling and meant stalls were more likely)).
Sandy Bridge has two full AGUs and they discovered the greater benefit came from just the extra store AGU capability (the extra load was still helpful, but really only for SMT). Haswell has those plus an addiitional store-only AGU. It gained them relatively little, which illustrates just how well two individually addressable fully functional AGUs can operate.
If we compare Zen to Sandy Bridge, we learn a few things that are interesting.
Sandy Bridge has 3 ALUs and 2 AGUs.
Zen has 4 ALUs and 2 AGUs.
Sandy Bridge shares its 3 ALU pipes with floating point instructions.
Zen has 4 dedicated floating point pipes.
There are certain cases where this pipeline dedication will be a meaningful benefit for Zen, such as when one thread is integer heavy and the other is floating point heavy (quite common, actually) while using SMT, or when on thread uses a great deal of each (which is fairly common in unoptimized complex loops).
Whatever you say
Can't wait for Zen to arrive. I was on these forums when Derpdozer was being hyped to the moon and I will be sure not to miss the discussion when Zen ultimately turns out to be a disappointment.
Because the focus seems to be on bulldozer's module design. The problem is that even if you take an 8 core bulldozer and turn off half of each module, it is still slow as dirt compared to pretty much every i5. An i5-6600k scores almost 8000 in passmark. The aforementioned bulldozer configured as 4 "real" cores only scores around 4500 in passmark. This is with all the modular design constraints removed. So even putting aside the module vs SMT design issues, AMD still needs to pull roughly 80% more performance out of their hat. How?
Arachnotronic says he longs for Zen to become a failure => That will lead to monopoly which he previously said he was against (in previous discussions we've had with ShintaiDK on that topic, thus the reference to that) => Therefore I wonder why Arachnotronic longs for Zen to become a failure, because it would go against his previous beliefs.
I don't long for Zen to be a failure, but the expectations are being inflated at such a rapid rate that it will almost certainly be a disappointment by the time it actually hits the shelves.
Define disappointment. Cause it sure as hell isn't looking like one despite what some Intel shills would have you believe.
I'm expecting Haswell level performance on average. I won't be disappointed especially since Skylake was overhyped as hell...it was hyped arguably more than Zen and it just turned out to be a disappointment.
Better perf/watt than Skylake as one poster in this thread suggested. At this rate? The expectation ahead of launch will be that Zen will take the absolute performance crown, performance per watt crown, and be much cheaper to produce than any competing Intel chip.
Better perf/watt than Skylake as one poster in this thread suggested. At this rate? The expectation ahead of launch will be that Zen will take the absolute performance crown, performance per watt crown, and be much cheaper to produce than any competing Intel chip.
I am expecting Haswell level performance per clock, but lower peak frequency and far fewer power management features. It may prove to be a competent low cost alternative to Intel products in desktops but I don't think it will be impressive in notebooks and other perf/watt sensitive use cases.
I don't think there is anyone on the forum that expects all of that from Zen. Thus they won't be disappointed either if it performs below that.
I think a lot of people will be happy with "just" an 8 core Ivy/Haswell-E performance. Some may even be ok with SB-E performance assuming it is priced lower than Intel's HEDT alternatives.
You missed us! Just glad to see you posting again (reaches for popcorn)
I am in no way expecting better performance or even better performance per watt than Skylake at all. My expectations are reasonable, just because some people are crazy doesn't mean everyone is hyping Zen up that much.
Wow. Intel has literally been spending billion$ on trying to eke out all of the performance/watt it can from each architecture and you think AMD is going to go from the lousy Bulldozer lineage to a new architecture built on a relatively shoestring budget on a foundry process optimized for mobile products and wind up with better perf/watt in key PC/server use cases? OK.
Why lower peak frequency? They're using Samsung's LPP 14nm node right? Should be able to achieve fairly high clocks.
You're forgetting something here, if it has Haswell level performance per clock, DDR4 support and a unified socket, then that instantly becomes about 5x more appealing to an enthusiast that isn't a fanboy of any brand.
Seems strange. But in that case I've missed it.Sure there are.
For me personally, I think it would have to be priced a bit lower than that. Hard to say exactly how much lower, since it depends on the options available at the time Zen is released. But if priced competitively enough, sure it'll benefit the customers. At least it won't be worse than what we have now with not much competition in the HEDT and server segments at all.If AMD prices its 8 core Zens at $899 and it delivers 8-core Haswell-E performance, will this bring the benefit to the consumers that you hope for?
On what do you base this notion? Samsung's 14nm LPP is, very rightfully, optimized for low power mobile applications since that's what Samsung's largest foundry customer (Apple) was gunning for. What makes you think that a high IPC/high frequency design will be particularly feasible on this process, especially designed by whatever team is left at AMD which to be frank is not exactly the industry's A-team?
OK, so why will it be any more appealing than the quad core Skylake chips you can buy today or the 6-8 core Broadwell-E chips that you'll be able to buy in a few months?
On what do you base this notion? Samsung's 14nm LPP is, very rightfully, optimized for low power mobile applications since that's what Samsung's largest foundry customer (Apple) was gunning for. What makes you think that a high IPC/high frequency design will be particularly feasible on this process, especially designed by whatever team is left at AMD which to be frank is not exactly the industry's A-team?
Apple is using Samsungs 14nm LPE, not LPP.
LPP is suited for more than Mobile and low clocks.