I would be happy to talk about it if we had anything beyond AMD kool-aid about this upcoming product.
Then why post, yeah maybe you should see yourself out . We know bits and pieces but the biggest problem with the nay sayers is they cant tell you whats good or whats bad about bulldozer, just that bulldozer suxors. Go read what agner has to say about things like Bulldozers predictors, prefetches and decode or the tests there have been on the load store system.
Then look at the things they haven't bothered/been able to fix, execution width, mispredict latency, L1i associativity, L2 latencies*. Now what matters for "IPC", recovering from stalls and racing to stalls and thats whats poor in CON cores and they never really addressed them (likely fundamental issues).
Now look at what they actually improved from bulldozer to ex,
Load/Store system update in every revision,
uop cache,
improved branch prediction
increases in TLB's
implemented DVFS
All these things can and likely will be used as a base for Zen along with Decode, PRF and prefetches (which along with predictors are still shared in Excavator). Scheduler direction will be interesting as jaguar and con cores are different there.
Now look at what has been said about zen, we have more execution ports ( good for loops, but also for things like branches which used the same port as mul on con cores), some instructions have moved form AGU to ALU (freeing up AGU time) . We know there is a complete new cache system. Thats two of con cores big problems right there. The FP units latency has dropped as FMA looks to be some kind of bridge(another sore point vs intel as they still have a non FMA FP adder).
On the guessing side we expect a shorter pipeline ( no more mid 4ghz targets) will help mispredict latency, larger PRF ( cuz SMT) which means the core can be more aggressive in predictive Loads when running 1 thread.
So you take the good work that has been done over 4 years and integrate that into a core that addresses the CON cores weakness. Thats very different from STARS to con core as almost everything fundamentally changed.
and just to give a link:
http://www.notebookcheck.net/fileadmin/_processed_/csm_carrizo_excavator_features_e7874bf3c5.jpg
Some good selectively memory from the select few........
i think there is room for optimism, i dont know how some people in here muster the will to drag themselves out of bed, "realist" is the excuse, cant justify that "realist" position with technical facts...........
*david kanter has commented that the arrays themselves are actually quite fast but CMT plus cache policy creates layout issues and WCC doesn't help latency only throughput.