The AMD FX-4100

[Olikan]

Unless I missed something, why is this CPU not considered a "true" quad core?

it is a quad core... but it's performance is more like 2 core + HT

it performance on linux is actually better than i thought

 

[Ferzerp]

Unless I missed something, why is this CPU not considered a "true" quad core?

From my understanding every FX cpu comes from the same die, with either 0, 1 or 2 "modules" disabled?

Isn't the FX-4100 just a Zambezi die with 2 modules disabled? Or are you counting the fact that its 2 "modules" and not 4 cores like the previous Phenom ][ X4?

Because, if it were "a true quad core", it would not matter what core does the execution, performance would be the same.

If it were a "true quad core" an FX-4100 would perform nearly the exact same at the same clock speed as an FX-81xx with half of each module disabled. (hint, it does not at all). Or, an FX-81xx with 4 cores disabled would perform (nearly) the same regardless of which 4 you chose to disable.

It is still 2 cores (or modules if you want to use AMDs terms) that can perform like 4 logical cores that do not perform as well as 4 "true" cores, just like Intel HT, though less is shared.

 

[soccerballtux]

October 2011 reg date, bulldozer thread, and spaces after nearly every sentence with an odd flow. Gee, I wonder if this is the same person again?


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Administrator Idontcare

for serious. AMDs marketing dept is too stupid to hire pro-AMD folks. IMHO.

 

[Idontcare]

Unless I missed something, why is this CPU not considered a "true" quad core?

With CMT there is no such thing as a true "core", one ,two, or quad...it is irony at its highest level.

That is why the notion of a "module" is required to enter into vernacular, and its also the reason you can't have "half a module" core steps.

What you are used to thinking of as a "core" is the module. It just so happens that the module can process two threads simultaneously.

So its a 2 thread/core situation.

But it is a true "quad", it can truly process four threads at the same time.

 

[Ferzerp]

By your reasoning, my i7 is an octocore.

It isn't.

 

[Idontcare]

By your reasoning, my i7 is an octocore.

It isn't.

Are you referring to my post which is directly above yours? I can't tell if this was directed at me, or towards another member.

 

[Ferzerp]

Yours. HT does those same things. 2 threads per core with shared resources.

 

[Idontcare]

By your reasoning, my i7 is an octocore.

It isn't.

Yours. HT does those same things. 2 threads per core with shared resources.

OK, but I don't see where "by my reasoning you'd call your i7 an octocore" because I never argued that reasoning in my post.

I said 2 threads/core. Your eight-thread capable i7 is a quad-core, as advertised.

I'm saying the "core" referred to by AMD with bulldozer is not really a core in any traditional sense of the term, hence referring to it as a "true" core is the irony.

AMD had to create the vernacular "module" to describe their CMT architecture because in truth the module is what we'd traditionally call the "core".

A 4 module bulldozer is a "true quad core". A 2 module bulldozer is not, its a dual-core processor with each core being dual-thread capable.

When you move away from a CMP architecture, be it to a CMT or SMT architecture, you are recognizing that the cores themselves are no longer representative of the traditional use of the term "core" from a CMP origin.

Which is why Intel doesn't market the 2600K as an octo-core, which is why its really semantically asinine (IMO) that AMD does market the 8150 as an octo-core.

 

[Ferzerp]

I misunderstood you. We were talking about the 2 "module" one, but you're talking about the 4 module one. Hence my confusion.

 

[jhu]

By your reasoning, my i7 is an octocore.

It isn't.

Would you not consider the UltraSPARC T1 as an octocore?

 

[Ferzerp]

Will it perform the same regardless of which cores are loaded?

Can you disable half the logical cores and have the same performance regardless of which half you disable?. If so, yes.

 

[nenforcer]

Will it perform the same regardless of which cores are loaded?

Can you disable half the logical cores and have the same performance regardless of which half you disable?. If so, yes.

No, and I think this is part of the problem with Bulldozer is that people are benchmarking with the FX-81X0 series disabling and enabling certain or half of the modules.

Some people report that enabling the even "threads" i.e. 0, 2, 4, 6 while disabling the odd "threads" 1, 3, 5 and 7 results in better performance than the FX-4100 with all 4 of its "threads" enabled and vice verse.

They reason that there is too much thread / cache contention in the 2 module FX-4100 chip.

Since the FX-81X0 series has 4 modules, only using half of the threads available per module makes it perform more like a true "quad core".

So in regards to the FX-6100, going by AMD's logic, this is there new "triple core" CPU with 3 modules * 2 threads per module.

You would expect by AMD's implementation that there 2 threads per module would outperform Intel's hyperthreaded Core i7's, but that hasn't turned out to be the case.

 

[Voo]

AMD had to create the vernacular "module" to describe their CMT architecture because in truth the module is what we'd traditionally call the "core".

Hmm, the definition for core I'm used to would be: Frontend, integer (and for the last decade fp) pipeline, scheduler and backend.

A module duplicates some parts of this, but by far not all. I agree that it's nearer to one than two cores, but calling it just one core undersells it a bit imho.

 

[Idontcare]

Hmm, the definition for core I'm used to would be: Frontend, integer (and for the last decade fp) pipeline, scheduler and backend.

A module duplicates some parts of this, but by far not all. I agree that it's nearer to one than two cores, but calling it just one core undersells it a bit imho.

How many cores does the UltraSparc T2 have? (Is it 8 cores or 16?)

UltraSPARC T2

• Two integer ALUs per core instead of one, each one being shared by a group of four threads
• One floating point unit per core, up from just one FPU for the entire chip

^ if AMD made the T2 they would call this a module, and claim it has two cores. Its a sad day when even SUN's marketing is seen to be more conservative than AMD's.

Bulldozer is a CMP microarchitecture comprised of what AMD calls "Modules"...the rest of the industry would call the AMD module a core, and the core is dual-thread capable in a CMT (vs SMT like Intel's) microarchitecture, not too unlike the Ultrasparc T2 core.

Again I don't think it can be understated here that the term "core" is being used by AMD in a way that breaks with convention with respect to the past decades of CMT nomenclature across the industry...and the reasons are obvious, they need it for marketing purposes because the performance alone isn't all that marketable.

 

[Ferzerp]

I think that's why it is important to agree on a definition that relies more on the smallest division that a processor can be divided in to where all portions function equally (for execution, not cache). For Intel processors, that would be the HT'ed core. For AMD's new thing, that would be what they're calling a module.

If you look at it this way, you cannot be fooled by marketing. If you split the execution capability of a quad core i7 in to 8, not all 8 perform the same, and they perform differently based on which of the 8 you load. If I load, say 1 and 3, it will perform differently than if I load 1 and 2 (being a single core+HT). If you drop that down to 4 divisions though, I can chose any 2 and run a given load and have practically the same performance. Yes, a core may be capable of multiple threads, but it does so at a performance penalty compared to spreading those threads across more cores.

On the AMD side, it really functions almost exactly the same. If you take the 4 "module" system and split it in to 8. Performance depends on which of the 8 you place your load. If I run the same process on two logical processors on the same core, performance will be worse than if I chose two on different cores. If you only split it in to 4, then performance of each core is equal. I can use 1 and 3, 1 and 4, etc. It won't matter.

A module is a core.

 

[sangyup81]

If the FX-4100 could overclock to 4.8GHz-5.0GHz I'd get one. No overclocking reviews on the 4100 yet though =(

 

[lehtv]

Yeah, waiting for those reviews... I'm expecting it'll overclock very nicely though, it could beat i3-2100 and X4 955/965 as a budget gaming CPU.

 

[crisium]

The whole point of Bulldozer was more cores and slightly more MHz at the sacrifice of IPC. So it is really only even worth considering at 8 cores. With 4 Core Athlon II's and Phenom II's, I'm not sure why anyone would pick up a 4 core BD. By AMD's own purposeful design, a 4 core BD is to be slower than a 4 Core PhII.

 

[Voo]

How many cores does the UltraSparc T2 have? (Is it 8 cores or 16?)

Hmm I don't know much about Sparc, but it seems it still has one integer pipeline just 2 ALUs which isn't that special considering that Intel has 3 ALUs, AMD used to have 3 now has 2 (which probably also factors in to the bad single threaded performance) - nobody so far has used that for "core count", but I fear you just got some PR people a nice idea

I'm not aware of anyone duplicating the integer pipeline before, so it seems somewhat new. Anyways, is it correct to call a module 2 cores? Not really, since lots of integral parts of a "core" are still shared. But calling it a single core also ignores some facts (i.e. duplicated pipeline) - but it certainly is closer to a single than two cores, I don't want to argue that (and I'm sure they'd have avoided lots of PR flak if their 4 module chips would've been labeled quad cores)

 

[sangyup81]

The whole point of Bulldozer was more cores and slightly more MHz at the sacrifice of IPC. So it is really only even worth considering at 8 cores. With 4 Core Athlon II's and Phenom II's, I'm not sure why anyone would pick up a 4 core BD. By AMD's own purposeful design, a 4 core BD is to be slower than a 4 Core PhII.

Same reason why anyone would pick up a Core i3-2100. Price. If the 4100 can outperform the i3-2100 when overclocked, budget overclockers may go for it

 

[lau808]

i would/will pick up a 4100 as a budget overclocker and also for the reason that the only important program i use to run (use sparingly now) takes advantage of only 4 cores. i dont/wont need more anytime soon. it also doesnt peg my dual core either. im one of the lucky ones who doesnt need the fastest quad available, this allows me quad core/thread and i get to overclock. everyone else imo would be better off with a 2500k if they can afford it

 

[BlueBlazer]

If the FX-4100 could overclock to 4.8GHz-5.0GHz I'd get one. No overclocking reviews on the 4100 yet though =(

Already posted here.....

........ At least someone on Youtube had the guts to post some benchmarks (while the "others" gone quiet). FX 4100 OC @ 4.9GHz running Cinebench 11.5 compared to AMD 965 @3.4GHz >>> FX 4100 OC @ 4.9GHz......

4.9GHz is as close as you can get.

IMHO this all boils down to the marketing department's "8 cores awesome-ness" gimmick, and puts AMD into a corner. Lots of hype but not real information. For the well informed, they know that Bulldozer is more like 4 cores with HyperThreading (for example, overclocker Chew*). They should have stick with the 4 cores and come up with some technology catchphrase for CMT, examples like "Super-Threading", "Real-Threading", "True-Threading", "Giga-Threading", "Turbo-Threading", "Power-Threading", etc (up to everyone's imagination). Then herald this as AMD's answer to Intel's HyperThreading. That makes the outlook not as bad as its currently is, with "8 cores" having to compete with competitor's 4 cores and barely beating current generation 6 cores. :hmm:

 

[AtenRa]

How many cores does the UltraSparc T2 have? (Is it 8 cores or 16?)

It can issue and execute 2 Strands(Threads) per Core per cycle. That makes it a 16 core but only 16 integer instructions per cycle.(see bellow)

[/LIST]^ if AMD made the T2 they would call this a module, and claim it has two cores. Its a sad day when even SUN's marketing is seen to be more conservative than AMD's.

AMD Bulldozer can issue, execute and retire two threads per module per cycle, making it an 8 core CPU (4 modules).

Bulldozer is a CMP microarchitecture comprised of what AMD calls "Modules"...the rest of the industry would call the AMD module a core, and the core is dual-thread capable in a CMT (vs SMT like Intel's) microarchitecture, not too unlike the Ultrasparc T2 core.

Just because SUN calls them a single core doesnt mean AMD has to call them the same. AMD calls them dual core per Module because of the two Independent Integer Execution Units (SUN call them ALUs pipelines).

Again I don't think it can be understated here that the term "core" is being used by AMD in a way that breaks with convention with respect to the past decades of CMT nomenclature across the industry...and the reasons are obvious, they need it for marketing purposes because the performance alone isn't all that marketable.

Since AMDs Bulldozer Module can issue, execute and retire two Integer or execute and retire two FP instructions per cycle when UltraSparc can only issue and execute two Integer per cycle, AMD's Module can be named dual core when Ultra Sparc T2 cannot.

http://www.opensparc.net/pubs/t2/docs//OpenSPARCT2_Core_Micro_Arch.pdf

OpenSPARC T2 is a single chip multi-threaded (CMT) processor. OpenSPARC T2
contains eight SPARC physical processor cores. Each SPARC physical processor core
has full hardware support for eight strands, two integer execution pipelines, one
floating-point execution pipeline, and one memory pipeline. The floating-point and
memory pipelines are shared by all eight strands. The eight strands are hardpartitioned
into two groups of four, and the four strands within a group share a
single integer pipeline. While all eight strands run simultaneously, at any given time
at most two strands will be active in the physical core, and those two strands will be
issuing either a pair of integer pipeline operations, an integer operation and a
floating-point operation, an integer operation and a memory operation, or a floatingpoint
operation and a memory operation. Strands are switched on a cycle-by-cycle
basis between the available strands within the hard-partitioned group of four using
a least recently issued priority scheme. When a strand encounters a long-latency
event, such as a cache miss, it is marked unavailable and instructions will not be
issued from that strand until the long-latency event is resolved. Execution of the
remaining available strands will continue while the long-latency event of the first
strand is resolved.

Yes i know that BD module only has 80% the performance of two cores in CMP, but BDs module design is so much different than ultraSpark T2 CMT that IMOH we shouldn't compare them directly.

http://realworldtech.com/page.cfm?ArticleID=RWT090406012516&p=2

 

[Ferzerp]

You conveniently ignored that it does not perform like 8 cores and instead performs like 4 cores with SMT.

Try to reconcile your direct-from-amd-marketing argument with my questions.

 

[AtenRa]

You conveniently ignored that it does not perform like 8 cores and instead performs like 4 cores with SMT.

Try to reconcile your direct-from-amd-marketing argument with my questions.

It performs as AMD has said, 80% of the CMP.

We can clearly see that from 2C/4T vs 4C/4T benchmarks.